M41ST87YMX6F datasheet(40/52 Pages) STMICROELECTRONICS

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Clock operation

M41ST87Y, M41ST87W

40/52

Doc ID 9497 Rev 8

The M41ST87Y/W only monitors the battery when a nominal VCC is applied to the device.

Thus applications which require extensive durations in the battery back-up mode should be

powered-up periodically (at least once every few months) in order for this technique to be

beneficial. Additionally, if a battery low is indicated, data integrity should be verified upon

power-up via a checksum or other technique.

3.14

trec bit

Bit D7 of clock register 04h contains the trec bit (TR). trec refers to the automatic continuation

of the deselect time after VCC reaches VPFD. This allows for a voltage settling time before

WRITEs may again be performed to the device after a power-down condition. The trec bit will

allow the user to set the length of this deselect time as defined by Table 12.

Table 12.

trec definitions

3.15

Electronic serial number

The M41ST87Y/W has a unique 8-byte lasered serial number with parity. This serial number

is “read only” and is generated such that no two devices will contain an identical number.

3.16

Oscillator stop detection

If the oscillator fail (OF) bit is internally set to a '1,' this indicates that the oscillator has either

stopped, or was stopped for some period of time, and can be used to judge the validity of the

clock and date data. This bit will be set to '1' any time the oscillator stops. The following

conditions can cause the OF bit to be set:

●

The first time power is applied (defaults to a '1' on power-up).

●

The voltage present on VCC or battery is insufficient to support oscillation.

●

The ST bit is set to '1.'

If the oscillator fail interrupt enable bit (OFIE) is set to a '1,' the IRQ/OUT pin will also be

asserted. The IRQ/OUT output is cleared by resetting the OF bit to '0,' resetting the OFIE bit

to '0,' or if the RST output is asserted (but is NOT cleared by reading the flag register).

The OF bit will remain set to '1' until written to logic '0.' The oscillator must start and have

run for at least 4 seconds before attempting to reset the OF bit to '0.' This function operates

both under normal power and in battery backup. If the trigger event occurs during a power-

down condition, this bit will be set correctly.

Note:

The ABE bit must be set to '1' for the IRQ/OUT pin to be activated in battery backup.

trec bit (TR)

STOP bit (ST)

trec time

Units

Min

Max

98(1)

Default setting.

200

2000

µs

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