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M41ST87YSS6 数据表(PDF) 9 Page - STMicroelectronics |
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M41ST87YSS6 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 52 page ![]() M41ST87Y, M41ST87W Description Doc ID 9497 Rev 8 9/52 Table 1. Signal names XI(1) 1. Available in SSOP (SS) package only. Oscillator input XO(1) Oscillator output ECON (2) 2. Available in SOX28 (MX) package only. Conditioned chip enable output EX(2) External chip enable IRQ/OUT(3) 3. Open drain output. Interrupt/out output (open drain) PFI1 Power fail input 1 PFI2 Power fail input 2 PFO1 (4) 4. Programmable output (open drain or full-CMOS). Power fail output 1 PFO2 (4) Power fail output 2 RST(3) Reset output (open drain) RSTIN1 Reset 1 input RSTIN2(2) Reset 2 input SCL Serial clock input SDA Serial data input/output SQW/FT(4) Square wave output/frequency test WDI(2) Watchdog input VCC Supply voltage VOUT Voltage output VSS Ground F32k (3) 32 kHz square wave output (open drain) TP1IN Tamper pin 1 input TP2IN Tamper pin 2 input TPCLR (2) Tamper pin RAM clear VBAT Positive battery pin input NF(5) 5. Should be connected to VSS. No function NC(5) No connect |
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