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STM706P 数据表(PDF) 12 Page - STMicroelectronics |
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STM706P 数据表(HTML) 12 Page - STMicroelectronics |
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12 / 33 page ![]() Operation STM706T/S/R, STM706P, STM708T/S/R 12/33 Doc ID 10518 Rev 10 3.5 Power-fail input/output The power-fail input (PFI) is compared to an internal reference voltage (independent from the VRST comparator). If PFI is less than the power-fail threshold (VPFI), the power-fail output (PFO) will go low. This function is intended for use as an undervoltage detector to signal a failing power supply. Typically PFI is connected through an external voltage divider (see Figure 9) to either the unregulated DC input (if it is available) or the regulated output of the VCC regulator. The voltage divider can be set up such that the voltage at PFI falls below VPFI several milliseconds before the regulated VCC input to the STM70x or the micro- processor drops below the minimum operating voltage. If the comparator is unused, PFI should be connected to VSS and PFO left unconnected. PFO may be connected to MR on the STM70x so that a low voltage on PFI will generate a reset output. 3.6 Ensuring a valid reset output down to VCC = 0 V When VCC falls below 1 V, the state of the RST output can no longer be guaranteed, and becomes essentially an open circuit. If a high value pulldown resistor is added to the RST pin, the output will be held low during this condition. A resistor value of approximately 100 k Ω will be large enough to not load the output under operating conditions, but still sufficient to pull RST to ground during this low voltage condition (see Figure 10). Figure 10. Reset output valid to ground circuit AI08844 STM70x RST R1 |
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