Ω. The above equations also assume that

Example: Connect 100k

Alternately, to avoid fault shutdown due to the delay of

state value.

Output Voltage

The output voltage range at the source of the n-MOSFET

The external n-MOSFET contains a parasitic diode from

source to drain. If the output is ever anticipated to

exceed the input, current flows from source to drain. If

this is undesirable, external protection is needed. A

simple solution is the placement of a diode in series,

from IN_ to the drain of the n-MOSFET, so that reverse

current is not possible. Due to the forward-voltage drop

of the diode, the maximum output voltage is reduced

and additional power is consumed in the diode.

Enable and POK

The MAX8563/MAX8564/MAX8564A have independent

enable control inputs (EN1, EN2, and EN3). Drive EN1

high to enable output 1. Drive EN2 high to enable out-

put 2. Drive EN3 high to enable output 3. When EN_ is

driven low, the corresponding DRV_ is internally pulled

to GND and POK_ is internally pulled low.

The POK_ is an open-drain output that provides the sta-

tus of the output voltage and pulls low depending upon

circuit conditions. During startup, once the FB_ reaches

the POK_ threshold, the POK_ signal goes high. The

POK_ threshold has 30mV of hysteresis. When the out-

put voltage drops 12% below the nominal regulated

voltage, POK_ pulls low. All POK_ outputs pull low

when UVLO is activated or when the internal VL regula-

tor and reference are not ready.

Output Undervoltage and

Overload Protection

When an overload event or short circuit occurs, the

device that is most vulnerable is the external n-MOSFET.

The MAX8563/MAX8564/MAX8564A monitor the output

voltage to protect the MOSFET. When DRV_ is at its maxi-

mum voltage and the output voltage drops below 80%

but is still greater than 60% of its nominal voltage for

more than 50µs, the MAX8563/MAX8564/MAX8564A

shut down that particular regulator output by pulling

DRV_ to GND. Note that there is an additional inherent

delay in turning off the MOSFET. The delay is a function

of the compensation capacitor and the MOSFET. If the

output recovers to greater than 80% within 50µs, it is not

considered to be in overload and no action is taken.

When the output voltage drops below 60% of its nominal

voltage, the MAX8563/MAX8564/MAX8564A immediately

shut down that particular regulator output by pulling

be recycled below the UVLO or the corresponding EN_

must be recycled. The overload protection is shown in

the Typical Operating Characteristics.

Design Procedure

Output Voltage Setting

The minimum output voltage for each controller of the

MAX8563/MAX8564/MAX8564A is typically 0.5V. The

maximum output voltage is adjustable up to 3.3V with

put voltage, connect the FB_ pin to the center of a volt-

age-divider between OUT_ and GND (Figure 5). The

resistor-divider current should be at least 1mA per 1A of

maximum output current; i.e., for a 3A maximum output

current, set the resistor-divider bias current to

≥ 3mA:

R

V

I

V

II

B

FB

OUT MIN

FB

OUT MAX

OUT MAX

(

)

()

()

≤=

×

=

1000

500

I

I

OUT MIN

OUT MAX

()

()

≥

1000

13

.

__

<

+

⎛

⎝⎜

⎞

⎠⎟

×

−

R

RR

VV

V

E

ED

DD

IN

IN

±1%, Ultra-Low Output Voltage, Dual and Triple

Linear n-FET Controllers

10

______________________________________________________________________________________

MAX8563

MAX8564

MAX8564A

EN_

IN_

Figure 4. Voltage-Divider on EN_