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STW4811MBRAT/HF 数据表(PDF) 35 Page - STMicroelectronics |
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STW4811MBRAT/HF 数据表(HTML) 35 Page - STMicroelectronics |
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35 / 85 page ![]() STw4811M/STw4811N Functional description CD00131784 35/85 Power control register at address 0Ah Table 27. Power control register at address 0Ah Address 1Fh Address 1Eh 15 14 13 12 11 10 9876 5 4321 0 Not used 0101 0 vaux_ force_ sleep not used vio_ vmem_ force_ sleep vcore_ force_ sleep EN Bits Name Value Settings Default 4 vaux_force_sleep 0 1 0: Vaux keeps the state controlled by Vaux_sleep and Pwren 1: VAUX goes in sleep mode (for any PWREN level) 0 2 vio_vmem_force_ sleep 0 1 0: VIO_VMEM keeps the state controlled by vio_vmem_sleep and Pwren 1: VIO_VMEM goes in sleep mode (for any PWREN level) 0 1 vcore_force_slee p 0 1 0: VCORE keeps the state controlled by vcore_sleep and Pwren 1: VCORE goes in sleep mode (for any PWREN level) 0 |
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