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STHDLS101 数据表(PDF) 8 Page - STMicroelectronics |
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STHDLS101 数据表(HTML) 8 Page - STMicroelectronics |
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8 / 25 page ![]() Pin configuration STHDLS101 8/25 Pin number Name Type Function 14 OUT_D4- Output HDMI 1.3 compliant TMDS output. OUT_D4- makes a differential output signal with OUT_D4+. 15 VCC33 Power 3.3 V±10% DC supply 16 OUT_D3+ Output HDMI 1.3 compliant TMDS output. OUT_D3+ makes a differential output signal with OUT_D3-. 17 OUT_D3- Output HDMI 1.3 compliant TMDS output. OUT_D3- makes a differential output signal with OUT_D3+. 18 GND Power Ground 19 OUT_D2+ Output HDMI 1.3 compliant TMDS output. OUT_D2+ makes a differential output signal with OUT_D2-. 20 OUT_D2- Output HDMI 1.3 compliant TMDS output. OUT_D2- makes a differential output signal with OUT_D2+. 21 VCC33 Power 3.3 V±10% DC supply 22 OUT_D1+ Output HDMI 1.3 compliant TMDS output. OUT_D1+ makes a differential output signal with OUT_D1-. 23 OUT_D1- Output HDMI 1.3 compliant TMDS output. OUT_D1- makes a differential output signal with OUT_D1+. 24 GND Power Ground 25 OE_N Input Enable for level shifter path. 3.3 V tolerant low-voltage single-ended input. Internal pull-down enables the device when unconnected. OE_N IN_D termination OUT_D Outputs 1 High-Z High-Z 050 Ω Active 26 VCC33 Power 3.3 V±10% DC supply 27 GND Power Ground 28 SCL_SINK Output 5 V DDC clock I/O. Pulled-up by external termination to 5 V. Connected to SCL_SOURCE through voltage- limiting integrated NMOS pass-gate. 29 SDA_SINK I/O 5V DDC data I/O. Pulled-up by external termination to 5V. Connected to SDA_SOURCE through voltage- limiting integrated NMOS pass-gate. Table 2. Pin description (continued) |
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