TLE7184F

Description of Modes, Protection and Diagnostic Functions

Data Sheet

22

Rev. 1.0, 2008-12-04

Sleep Mode:

The sleep mode is entered if the device is in the Go-to-sleep Mode and the VDD voltage is lower than

V

The complete chip is deactivated beside the wake-up function (see Wake-up Mode). This mode is designed for

lowest current consumption from the power net of the car. The passive clamping is active. For details see the

description of passive clamping, see Chapter 9.2.15.

The only way to leave the Sleep Mode is to go to the Wake-up Mode.

Wake-up Mode:

The TLE7184F wakes up if INH (=KL15) is high or if IFMA is low and

V

In this mode all supplies are ramping up. As soon as the internal 5V is available, a so called wake-up timer starts

to run. If the IC reaches this state, the wake up will continue even if the wake up signals at INH or IFMA disappear.

The PWM interface (IFMA) is active as soon as the VDD voltage is sufficient high. During this time it is expected

that the supplies are powered up and the µC sets the RGS to high. All external MOSFETs are switched off actively

or passively. When the wake up timer is expired the IC goes into the Error mode.

In this mode all errors will be ignored beside Over Temperature Shut Down or

V

Error Mode

The Error Mode can be reached in 3 different ways:

1. The device is in Wake-up Mode and the wake up timer expires

2. The device is in Normal Mode and one or more of the following errors occur: VREG Under Voltage Shut Down,

VDD Under Voltage Shut Down, Over Current Shut Down, VDH Over Voltage Shut Down, IOV Over Voltage

Shut Down, Short Circuit Detection or SCDL Open Detection.

3. The device is in Normal Mode with OT-Prewarning and one or more of the following errors occur: VREG Under

Voltage Shut Down, VDD Under Voltage Shut Down, Over Current Shut Down, VDH Over Voltage Shut Down,

IOV Over Voltage Shut Down, Short Circuit Detection or SCDL Open Detection.

In this mode an Error is set at the ERROR Pin and all external MOSFETs are actively switched off as long as the

bootstrap voltages allows it. The interface is active. VDHS switch is on and the current sense functions are

working. VDD and VREG are active. Passive clamping is not active.

The Error mode can be left in the following ways:

1. If no error is present, the IC can be sent to Normal Mode by a reset with the RGS pin.

2. If a VREG Under Voltage Shut Down occurs and no Over Temperature Prewarning is present, the device will

go to VREG Shut-down Mode.

3. If VDD Under Voltage Shut Down occurs or a VREG Under Voltage Shut Down together with a Over

Temperature Prewarning occurs, the device will go into Deadlock Mode.

4. If Over Temperature Prewarning is present, the IC can be sent to Normal Mode with OT-Prewarning by a reset

with the RGS pin.

Normal Mode

The Normal Mode can be reached in two different ways:

1. The device is in Error Mode, no error is present and a reset is performed by the RGS pin.

2. The device is in Normal Mode with OT-Prewarning, the chip temperature is below the OT-Prewarning level and

a reset is performed by the RGS pin.

In the Normal Mode all functions are active and available with the regular limitations of the bootstrap principle. The

gate drive output stages can be controlled with the input pins.

The Normal Mode can be left in 5 ways:

1. The devices goes to the Go-To-Sleep Mode by setting RGS to low for a time longer than

t

2. If a Over Temperature Prewarning occurs the device goes into the Normal Mode with OT-Prewarning.