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IRPLDIM3 数据表(PDF) 15 Page - International Rectifier |
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IRPLDIM3 数据表(HTML) 15 Page - International Rectifier |
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15 / 27 page ![]() www.irf.com - 15 - collector node is then connected via R18 to CDIV and R19 to 0 V (COM). This averages the PWM signal and provides a DC reference to connect to the IRS2158D, which varies between 0V and the maximum voltage set. The range can be changed if necessary by adjusting the value of R19. The value of the lamp current sensing resistor RLS will determine the feedback voltage provided to the op-amp feedback circuit of the IRS2158D. The value of RLS should be selected to provide as large a feedback as possible without dissipating too much power at maximum light output. It is recommended to keep the power dissipation in RLS below 0.25 W. A delay is usually incorporated into dimming ballasts to provide a smooth fade from one dimming level to the next. For example, if the control inputs were to be shorted together, the lamp would fade down to minimum brightness over a period determined by the values used. This neatly avoids any flicker that may be caused by sudden changes in load in the PFC boost regulator section. In this case delay is provided via the time constant of R18 and CDIV. As the frequency of the PWM signal from the opto-isolator is of the order of tens of Hz, the delay has been designed to be long enough to ensure minimal ripple on the DC control voltage input to the IC. This can be increased if a longer fade time is desired by making CDIV larger. Since the lamp arc current is being sensed with a resistor, it is necessary to use voltage mode preheating to avoid detecting the sum of the current in the arc added to the resonant output capacitor (CRES) current. This has an additional advantage that during preheat and prior to ignition of the lamp the arc current will always be zero and consequently the feedback circuit will not influence the oscillator frequency at all until the lamp is running. This means that by setting the value of RPH the preheat will occur in exactly the same way independent of the dimming control voltage achieving optimum preheat and ignition under all conditions. Design of the Ballast The initial step in designing the ballast is to determine values required for the resonant output inductor LRES and capacitor CRES. The Ballast Design Assistant (BDA) software, which can be downloaded from the International Rectifier web site, is an extremely useful tool in doing this. The BDA software used should be Version 4.2.x or above, this can be determined by clicking the Help button and clicking About Ballast Designer. The following inputs were selected: IC IRS2158D Input 90 to 265VAC/500VDC Lamp T5 28W Configuration Single lamp/Voltage mode heating Table 2: Initial BDA inputs. Lamp type: TL5/28W, Line Input Voltage: 90-305 VAC The next step is to click “Calculate”. This displays the operating point for the ballast and calculates the values of the tank components, i.e. LRES = 5.9 mH and CRES = 3.3 nF. |
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