AD8375

Rev. 0 | Page 6 of 24

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

PIN 1

INDICATOR

1

VCOM

2

VIN+

3

VIN–

4

A4

5

A3

6

A2

15 VOUT+

16 VOUT–

17 VOUT+

18 VOUT–

14 COMM

13 VPOS

AD8375

TOP VIEW

(Not to Scale)

Figure 3. 24-Lead LFCSP

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

VCOM

Common-Mode Pin. Typically bypassed to ground using external capacitor.

2

VIN+

Voltage Input Positive.

3

VIN−

Voltage Input Negative.

4

A4

MSB for the 5-Bit Gain Control Interface.

5

A3

MSB − 1 for the Gain Control Interface.

6

A2

MSB − 2 for the Gain Control Interface.

7

A1

LSB + 1 for the Gain Control Interface.

8

A0

LSB for the 5-Bit Gain Control Interface.

9, 10, 12, 13, 23

VPOS

Positive Supply Pins. Should be bypassed to ground using suitable bypass capacitor.

11, 14, 20, 21, 22, 24

COMM

Device Common (DC Ground).

15, 17

VOUT+

Positive Output Pins (Open Collector). Require dc bias of +5 V nominal.

16, 18

VOUT−

Negative Output Pins (Open Collector). Require dc bias of +5 V nominal.

19

PWUP

Chip Enable Pin. Enabled with a logic high and disabled with a logic low.