| 数据搜索系统,热门电子元器件搜索 |
|
FX489 数据表(PDF) 11 Page - CML Microcircuits |
|
|
|||||||||||||||||||||||||||||
FX489 数据表(HTML) 11 Page - CML Microcircuits |
|
11 / 12 page ![]() 11 Specification Absolute Maximum Ratings Exceeding the maximum rating can result in device damage. Operation of the device outside the operating limits is not implied. Supply voltage -0.3 to 7.0V Input voltage at any pin (ref V SS = 0V) -0.3 to (V DD + 0.3V) Sink/source current (supply pins) +/- 30mA (other pins) +/- 20mA Total device dissipation @ T AMB 25°C 800mW Max. Derating 10mW/°C Operating temperature range: FX489DW/P -40°C to +85°C Storage temperature range: FX489DW/P -40°C to +85°C Operating Limits All device characteristics are measured under the following conditions unless otherwise specified: V DD = 5.0V, T AMB = 25°C. Xtal/Clock Frequency = 4.096MHz. Data Rate = 8000 bits/sec. Noise Bandwidth = Bit Rate Characteristics See Note Min. Typ. Max. Unit Static Values Supply Voltage (V DD) 4.5 5.0 5.5 V Supply Current Tx PS Rx PS 1 1 1 - 1.0 - mA 0 1 - 3.0 - mA 1 0 - 4.0 - mA 0 0 - 7.0 - mA Input Logic Levels Logic “1” 3.5 - - V Logic “0” - - 1.5 V Logic Input Current 2 -5.0 - 5.0 µA Logic “1”Output Level at IOH = -120µA 4.6 - - V Logic “0”Output Level at IOL = 120µA - - 0.4 V Rx, Tx Data Rate 4000 19200 bits/sec Transmit Parameters Tx OUT, Output Impedance 3 - 1.0 - k Ω Tx OUT, Level 4 0.8 1.0 1.2 V p-p Tx Data Delay (BT = 0.3) 5 - 2.0 2.5 bit-periods (BT = 0.5) 5 - 1.5 2.0 bit-periods Tx PS to Output-Stable Time 6 - 4.0 - bit-periods Receive Parameters Rx Amplifier - Input Impedance 1.0 - - M Ω Output Impedance 7 - 10.0 - k Ω Voltage Gain - 50.0 - dB Rx Filter Signal Input Level 8 0.7 1.0 1.3 V p-p Rx Time Delay 9 - - 3.0 bit-periods On-Chip Xtal Oscillator R IN 10.0 - - M Ω R OUT 5.0 - 15.0 k Ω Voltage Gain - 15.0 - dB Xtal/Clock Frequency 1.0 – 5.0 MHz “High” Pulse Width 10 80.0 - - ns “Low” Pulse Width 10 80.0 - - ns Notes 1. Not including current drawn from the FX489 pins by external circuitry. See Absolute Maximum Ratings. 2. For V IN in the range VSS to VDD. 3 For a load of 10k Ω or greater. Tx PS input at logic “0”; Tx Enable = “1”. 4. Data pattern of “1111000011110000 ..” 5. Measured between the rising edge of ‘Tx Clock’ and the centre of the corresponding bit at ‘Tx Out.’ 6. Time between the falling edge of ‘Tx PS’ and the ‘Tx Out’ voltage stabilising to normal output levels. 7. For a load of 10k Ω or greater. Rx PS input at logic “0”. 8. For optimum performance, measured at the ‘Rx Feedback’ pin for a “1111000011110000 ...” pattern. 9. Measured between the centre of bit at ‘Rx Signal In’ and corresponding rising edge of the ‘Rx Clock’. 10. Timing for an external clock input to the Xtal/Clock pin. |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |