2

Pin Number

Function

Xtal: The output of the on-chip clock oscillator.

Xtal/Clock: The input to the on-chip Xtal oscillator. A Xtal, or externally derived clock (f

input should be connected here. If an externally generated clock is to be used, it should be

connected to this pin and the “Xtal” pin left unconnected. Note that operation of the FX489 without

a suitable Xtal or clock input may cause device damage.

ClkDivA:

Two logic level inputs that control the internal clock divider and hence the transmit and

receive data rate. See Table 1.

ClkDivB:

Rx Hold: A logic “0” applied to this input will ‘freeze’ the Clock Extraction and Level Measurement

circuits unless they are in ‘acquire’ mode.

RXDCacq: A logic “1” applied to this input will set the Rx Level Measurement circuitry to the

‘acquire’ mode.

PLLacq: A logic “1” applied to this input will set the Rx Clock Extraction circuitry to ‘acquire’ mode

(see Table 2).

Rx PS: A logic “1” applied to this input will powersave all receive circuits except for “Rx Clock ”

output (which will continue at the set bit-rate) and cause the “Rx Data” and “Rx S/N” outputs to go

to a logic “0”.

V

capacitor mounted close to the pin.

Rx Feedback: The output of the Rx Input Amplifier/The input to the Rx Filter.

Rx Signal In: The input to Rx input amplifier.

V

FX489DW

FX489P

1

2

3

4

5

6

7

8

9

10

11

12