AD7466/AD7467/AD7468

Rev. C | Page 12 of 28

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

6

5

4

1

2

3

GND

SDATA

SCLK

TOP VIEW

(Not to Scale)

AD7466/

AD7467/

AD7468

CS

Figure 4. SOT-23 Pin Configuration

8

7

6

5

1

2

3

4

NC = NO CONNECT

SDATA

GND

NC

NC

SCLK

TOP VIEW

(Not to Scale)



AD7466/



AD7467/

AD7468

CS

Figure 5. MSOP Pin Configuration

Table 6. Pin Function Descriptions

Pin No.

SOT-23

MSOP

Mnemonic

Description

6

1

CS

Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the

devices and frames the serial data transfer.

1

8

2

7

GND

Analog Ground. Ground reference point for all circuitry on the devices. All analog input signals should

be referred to this GND voltage.

3

6

5

2

SDATA

Data Out. Logic output. The conversion result from the AD7466/AD7467/AD7468 is provided on this

output as a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data

stream from the AD7466 consists of four leading zeros followed by the 12 bits of conversion data,

provided MSB first. The data stream from the AD7467 consists of four leading zeros followed by the 10

bits of conversion data, provided MSB first. The data stream from the AD7468 consists of four leading

zeros followed by the 8 bits of conversion data, provided MSB first.

4

3

SCLK

Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the parts. This clock

input is also used as the clock source for the conversion process of the parts.

4, 5

NC

No Connect.