AD7466BRTZ-R datasheet(3/28 Pages) AD

3 / 28 page

AD7466/AD7467/AD7468

Rev. C | Page 3 of 28

SPECIFICATIONS

AD7466

VDD = 1.6 V to 3.6 V, fSCLK = 3.4 MHz, fSAMPLE = 100 kSPS, unless otherwise noted. TA = TMIN to TMAX, unless otherwise noted.

The temperature range for the B version is −40°C to +85°C.

Table 1.

Parameter

B Version

Unit

Test Conditions/Comments

DYNAMIC PERFORMANCE

fIN = 30 kHz sine wave

Signal-to-Noise and Distortion (SINAD)

dB min

1.8 V ≤ VDD ≤ 2 V; see the Terminology section

dB min

2.5 V ≤ VDD ≤ 3.6 V

dB typ

VDD = 1.6 V

Signal-to-Noise Ratio (SNR)

dB min

1.8 V ≤ VDD ≤ 2 V; see the Terminology section

dB typ

1.8 V ≤ VDD ≤ 2 V

dB min

2.5 V ≤ VDD ≤ 3.6 V

70.5

dB typ

VDD = 1.6 V

Total Harmonic Distortion (THD)

−83

dB typ

See the Terminology section

Peak Harmonic or Spurious Noise (SFDR)

−85

dB typ

See the Terminology section

Intermodulation Distortion (IMD)

fa = 29.1 kHz, fb = 29.9 kHz; see the Terminology

section

Second-Order Terms

−84

dB typ

Third-Order Terms

−86

dB typ

Aperture Delay

ns typ

Aperture Jitter

ps typ

Full Power Bandwidth

3.2

MHz typ

@ 3 dB, 2.5 V ≤ VDD ≤ 3.6 V

1.9

MHz typ

@ 3 dB, 1.6 V ≤ VDD ≤ 2.2 V

750

kHz typ

@ 0.1 dB, 2.5 V ≤ VDD ≤ 3.6 V

450

kHz typ

@ 0.1 dB, 1.6 V ≤ VDD ≤ 2.2 V

DC ACCURACY

Maximum specifications apply as typical figures when

VDD = 1.6 V

Resolution

Bits

Integral Nonlinearity

±1.5

LSB max

See the Terminology section

Differential Nonlinearity

−0.9/+1.5

LSB max

Guaranteed no missed codes to 12 bits; see the

Terminology section

Offset Error

±1

LSB max

See the Terminology section

Gain Error

±1

LSB max

See the Terminology section

Total Unadjusted Error (TUE)

±2

LSB max

See the Terminology section

ANALOG INPUT

Input Voltage Ranges

0 to VDD

DC Leakage Current

±1

μA max

Input Capacitance

pF typ

LOGIC INPUTS

Input High Voltage, VINH

0.7 × VDD

V min

1.6 V ≤ VDD < 2.7 V

V min

2.7 V ≤ VDD ≤ 3.6 V

Input Low Voltage, VINL

0.2 × VDD

V max

1.6 V ≤ VDD < 1.8 V

0.3 × VDD

V max

1.8 V ≤ VDD < 2.7 V

0.8

V max

2.7 V ≤ VDD ≤ 3.6 V

Input Current, IIN, SCLK Pin

±1

μA max

Typically 20 nA, VIN = 0 V or VDD

Input Current, IIN, CS Pin

±1

μA typ

Input Capacitance, CIN

pF max

Sample tested at 25°C to ensure compliance

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