AD8222BCPZ-R7 datasheet(14/24 Pages) AD

14 / 24 page

AD8222

Rev. A | Page 14 of 24

OUTPUT VOLTAGE STEP SIZE (V)

SETTLED TO 0.01%

SETTLED TO 0.001%

Figure 39. Settling Time vs. Step Size (G = 1)

100

SETTLED TO 0.01%

SETTLED TO 0.001%

GAIN

100

Figure 40. Settling Time vs. Gain for a 10 V Step

200

180

160

140

120

100

11M

100k

10k

100

FREQUENCY (Hz)

GAIN = 1

GAIN = 1000

SOURCE VOUT

SMALLER TO

AVOID SLEW

RATE LIMIT

SOURCE

VOUT = 20V p-p

THERMAL CROSSTALK

VARIES WITH LOAD

Figure 41. Channel Separation vs. Frequency, RL = 2 kΩ, Source Channel at G = 1

100

10k

100k

10M

FREQUENCY (Hz)

–40

–20

GAIN = 1000

GAIN = 100

GAIN = 10

GAIN = 1

Figure 42. Differential Output Configuration: Gain vs. Frequency

10k

100

100k

FREQUENCY (Hz)

100

LIMITED BY

MEASUREMENT

SYSTEM

OUTPUT BALANCE = 20 log

VDIFF_OUT

VCM_OUT

Figure 43. Differential Output Configuration:

Output Balance vs. Frequency

AD8222BCPZ-R7 数据表(PDF) 14 Page - Analog Devices

AD8222BCPZ-R7 数据表(HTML) 14 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

数据表下载

链接网址

AD8222BCPZ-R7 数据表(PDF) 14 Page - Analog Devices

AD8222BCPZ-R7 数据表(HTML) 14 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

数据表 下载

链接网址

数据表下载