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ADVANCED COMMUNICATIONS & SENSING

DATASHEET

SX8124

24 hours timer synchronized on 50/60Hz mains

ACS - Revision 2.4

October 2010

© Semtech Corp.

3.1

Digital input levels

Input thresholds levels scale with VDD. Inputs have an hysteresis based on a Schmitt trigger schematics.

3.2

Pin states

Figure 2. Input level scales with VDD

Table 8.

Pinout vs Power mode

Pin#

Pin name

Pin type

Pin state

Safe mode

Low voltage mode

Active mode

1

DURATION

Analog input

High impedance

High impedance

High impedance

2

PHASE

Digital input

High impedance

High impedance

High impedance

3

START

Digital input

High impedance

pull up

pull up

4

LED

Digital output

High impedance

VSS

43kHz burst or VSS

5

NOUT

Digital output

High impedance

VSS

VSS or VDD

6

VSS

Power ground

Negative supply

Negative supply

Negative supply

7

OUT

Digital input

High impedance

VDD

VSS or VDD

8

VDD

Power positive

Positive supply

Positive supply

Positive supply

VDD

VIH

VIL

1

0

VDD

VIL, VIH vs VDD

2

1.5

0.5

0.8

1

1.2

1.4

1.6

1.8

2

Threshold