34LC02 datasheet(8/36 Pages) MICROCHIP

8 / 36 page

34AA02/34LC02

DS22029F-page 8

 2011 Microchip Technology Inc.

4.2

Page Write

The write control byte, word address and the first data

byte are transmitted to the 34XX02 in the same way as

in a byte write. Instead of generating a Stop condition,

the master transmits up to 15 additional data bytes to

the 34XX02, which are temporarily stored in the on-

chip page buffer and will be written into the memory

after the master has transmitted a Stop condition. Upon

receipt of each word, the four lower order Address

Pointer bits are internally incremented by one. The

higher order four bits of the word address remain

constant. If the master should transmit more than 16

bytes prior to generating the Stop condition, the

address counter will roll over and the previously

received data will be overwritten. As with the byte write

operation, once the Stop condition is received, an

internal write cycle will begin (Figure 4-2). If an attempt

is made to write to the array when the hardware write

protection has been enabled, the device will acknowl-

edge the command, but no data will be written. The

write cycle time must be observed even if the write

protection is enabled.

FIGURE 4-1:

BYTE WRITE

FIGURE 4-2:

PAGE WRITE

Note:

Page write operations are limited to

writing bytes within a single physical page,

regardless of the number of bytes actually

being written. Physical page boundaries

start at addresses that are integer multi-

ples of the page buffer size (or ‘page size’)

and end at addresses that are integer mul-

tiples of [page size – 1]. If a Page Write

command attempts to write across a phys-

ical page boundary, the result is that the

data wraps around to the beginning of the

current page (overwriting data previously

stored there), instead of being written to

the next page, as might be expected. It is

therefore necessary for the application

software to prevent page write operations

that would attempt to cross a page

boundary.

Bus Activity

Master

SDA Line

Bus Activity

Control

Byte

Word

Address

Data

Bus Activity

Master

SDA Line

Bus Activity

Control

Byte

Word

Address (n)

Data (n)

Data (n + 15)

Data (n + 1)

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