HCS361 datasheet(16/42 Pages) MICROCHIP

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HCS361

DS40146F-page 16

6.0

PROGRAMMING THE HCS361

When using the HCS361 in a system, the user will have

to program some parameters into the device including

the serial number and the secret key before it can be

used. The programming cycle allows the user to input

all 192 bits in a serial data stream, which are then

stored internally in EEPROM. Programming will be

initiated by forcing the PWM line high, after the S3 line

has been held high for the appropriate length of time.

S0 should be held low during the entire program cycle.

The S1 line on the HCS361 part needs to be set or

cleared depending on the LS bit of the memory map

(Key 0) before the key is clocked in to the HCS361. S1

must remain at this level for the duration of the pro-

gramming cycle. The device can then be programmed

by clocking in 16 bits at a time, followed by the word’s

complement using S3 or S2 as the clock line and PWM

as the data in line. After each 16-bit word is loaded, a

programming delay is required for the internal program

cycle to complete. An Acknowledge bit can be read

back after the programming delay (TWC). After the first

word and its complement have been downloaded, an

automatic bulk write is performed. This delay can take

up to Twc. At the end of the programming cycle, the

device can be verified (Figure 6-1) by reading back the

EEPROM. Reading is done by clocking the S3 line and

reading the data bits on PWM. For security reasons, it

is not possible to execute a Verify function without first

programming the EEPROM. A Verify operation can

only be done once, immediately following the Pro-

gram cycle.

FIGURE 6-1:

Programming Waveforms

FIGURE 6-2:

Verify Waveforms

The VDD pin must be taken to ground after a program/verify cycle.

DATA

Enter Program

Mode

(Data)

(Clock)

Bit 1

Bit 2

Bit 3

Bit 14 Bit 15

Bit 16 Bit 17

Repeat for each word

TCLKH

TCLKL

TWC

TDS

S2/S3

Data for Word 0 (KEY_0)

Data for Word 1

TDH

Bit 0

Bit 1

Bit 2

Bit 3

Bit 14 Bit 15

Bit 0

Bit 0 of Word0

Note 1: Unused button inputs to be held to ground during the entire programming sequence.

2: The VDD pin must be taken to ground after a Program/Verify cycle.

Acknowledge Pulse

DATA

(Clock)

(Data)

Note: A Verify sequence is performed only once immediately after the Program cycle.

End of Programming Cycle

Beginning of Verify Cycle

Bit 1 Bit 2

Bit 3

Bit 15

Bit 14

Bit 16 Bit 17

Bit190 Bit191

TWC

Data from Word0

TDV

S2/S3

Bit 0

Bit191

Bit190

Ack

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