16F1827 datasheet(6/406 Pages) MICROCHIP

6 / 406 page

TABLE 1:

18/20/28-PIN SUMMARY (PIC16(L)F1826/27)

RA0

AN0

—

CPS0

C12IN0-

—

SDO2(2)

—

RA1

AN1

—

CPS1

C12IN1-

—

SS2(2)

—

RA2

AN2

VREF-

DACOUT

CPS2

C12IN2-

C12IN+

—

RA3

AN3

VREF+

CPS3

C12IN3-

C1IN+

C1OUT

SRQ

—

CCP3(2)

—

RA4

AN4

—

CPS4

C2OUT

SRNQ

T0CKI

CCP4(2)

—

RA5

—

SS1(1)

—

Y(3)

MCLR, VPP

RA6

—

P1D(1)

P2B(1,2)

—

SDO1(1)

—

OSC2

CLKOUT

CLKR

RA7

—

P1C(1)

CCP2(1,2)

P2A(1,2)

—

OSC1

CLKIN

RB0

—

SRI

T1G

CCP1(1)

P1A(1)

FLT0

—

INT

IOC

—

RB1

AN11

—

CPS11

—

RX(1,4)

DT(1,4)

SDA1

SDI1

IOC

—

RB2

AN10

—

CPS10

—

RX(1),DT(1)

TX(1,4)

CK(1,4)

SDA2(2)

SDI2(2)

SDO1(1,4)

IOC

MDMIN

—

RB3

AN9

—

CPS9

—

CCP1(1,4)

P1A(1,4)

—

IOC

MDOUT

—

RB4

AN8

—

CPS8

—

SCL1

SCK1

IOC

MDCIN2

—

RB5

AN7

—

CPS7

—

P1B

TX(1)

CK(1)

SCL2(2)

SCK2(2)

SS1(1,4)

IOC

—

RB6

AN5

—

CPS5

—

T1CKI

T1OSI

P1C(1,4)

CCP2(1,2,4)

P2A(1,2,4)

—

IOC

—

ICSPCLK/

ICDCLK

RB7

AN6

—

CPS6

—

T1OSO

P1D(1,4)

P2B(1,2,4)

—

IOC

MDCIN1

ICSPDAT/

ICDDAT

VDD

15,16 17,19

—

VDD

Vss

5,6

3,5

———

—

——

—

——

VSS

Note 1:

Pin functions can be moved using the APFCON0 or APFCON1 register.

Functions are only available on the PIC16(L)F1827.

Weak pull-up always enabled when MCLR is enabled, otherwise the pull-up is under user control.

Default function location.

16F1827 数据表(PDF) 6 Page - Microchip Technology

16F1827 数据表(HTML) 6 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载