AD8420

Preliminary Technical Data

Rev. PrD | Page 8 of 8

THEORY OF OPERATION

–IN

+IN

REF

FB

V

I

V

I

ESD AND

OVERVOLTAGE

PROTECTION

ESD AND

OVERVOLTAGE

PROTECTION

+VS

–VS

+VS

–VS

R2

R1

A1

A2

A3

Figure 3. Simplified Schematic

ARCHITECTURE

The AD8420 consists of three amplifiers: two matched

transconductance amplifiers that convert voltage to current and

one integrator amplifier that converts current to voltage.

The AD8420 works as follows: assume a differential voltage is

applied across inputs +IN and -IN. This input voltage is

converted into a current by Amplifier A1. This will create a

difference in current between A1 and A2, which is fed into A3.

A3’s output voltage will change until A2 sinks all the current A1

is generating. Because the gain of A1 and A2 are matched, this

means the differential input voltage across A1 will appear across

the inputs of A2. Gain is set by the ratio of R2 to R1.

Because the AD8420 converts the input differential signals to a

current, there are no internal headroom issues as with

traditional instrumentation amplifier architectures. This is

particularly important when amplifying a signal with a

common mode voltage near one of the supply rails.

To improve robustness and ease of use, the AD8420 includes

overvoltage protection on its inputs. This protection scheme

allows input voltages well beyond the supply rails (as well as

wide differential input voltages) without damaging the part.

SETTING THE GAIN

The transfer function of the AD8420 is

where:

1

R2

1

R

G

+

=

Table 7. Suggested Resistors for Various Gains - 1% Resistors

R1 (kΩ)

R2 (kΩ)

Gain

none

short

1.00

49.9

49.9

2.00

20

80.6

5.03

10

90.9

10.09

5

95.3

20.06

2

97.6

49.8

1

100

101

1

200

201

1

499

500

1

1000

1001

While the ratio of R2 to R1 sets the gain, the absolute value of

the resistors is up to the designer. Larger values reduce power

consumption and output loading; smaller values limit FB input

bias current error.

A method that allows large value feedback resistors while

limiting FB bias current error is to place a resistor of value

R1||R2 in series with the REF terminal as shown in Figure 4. At

higher gains, this resistor can simply be the same value as R1.

–IN

+IN

R2

R1

G = 1+

R2

R1

AD8420

REF

FB

R1||R2

Figure 4. Cancelling Out Error from FB Input Bias Current