ADP194

Rev. 0 | Page 10 of 12

TIMING

Turn-on delay is defined as the delta between the time that EN

reaches >1.1 V until VOUT rises to ~10% of its final value. The

ADP194 includes circuitry to set the typical 1.5 μs turn-on delay

the turn-on delay is dependent on the input voltage.

0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

0

2040

6080

10

TIME (µs)

0

Figure 20. Typical Turn-On Delay Time with Varying Input Voltage

The rise time of VOUT is defined as the time delta between the

10% and 90% points of VOUT as it transitions to its final value.

It is dependent on the RC time constant where C = load capacit-

but capacitors can be used to suppress noise on the board. If

significant load capacitance is connected, inrush current may

be a concern.

A CH3

400mV

2

1

3

LOAD CURRENT

A CH3

400mV

2

1

3

LOAD CURRENT

The fall time or turn-off time of VOUT is defined as the time

delta between the 90% and 10% points of VOUT as it transi-

tions to its final value. The turn-off time is also dependent on

the RC time constant.

A CH3

400mV

2

1

3

LOAD CURRENT

A CH3

400mV

2

1

3

LOAD CURRENT