PCF2129A datasheet(39/69 Pages) NXP

39 / 69 page

PCF2129A_2

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Product data sheet

Rev. 02 — 7 May 2010

39 of 69

NXP Semiconductors

PCF2129A

Integrated RTC, TCXO and quartz crystal

The control bit TI_TP (register Watchdg_tim_ctl) is used to configure whether the

interrupts generated from the second/minute timer (flag MSF in register Control_2) are

pulsed signals or a permanently active signal. All the other interrupt sources generate a

permanently active interrupt signal which follows the status of the corresponding flags.

When the interrupt sources are all disabled, INT remains high-impedance.

• The flags MSF, AF, TSFx, and BF can be cleared by using the interface.

• The flag WDTF is read only. How it can be cleared is explained in Section 8.10.5.

• The flag BLF is read only. It is cleared automatically from the battery low detection

circuit when the battery is replaced.

8.12.1 Minute and second interrupts

Minute and second interrupts are generated by predefined timers. The timers can be

enabled independently from one another by the bits MI and SI in register Control_1.

However, a minute interrupt enabled on top of a second interrupt will not be

distinguishable since it will occur at the same time.

The minute/second flag MSF (register Control_2) is set logic 1 when either the seconds or

the minutes counter increments according to the actually enabled interrupt (see Table 45).

The MSF flag can be read and cleared by the interface.

When MSF is set logic 1:

• If TI_TP is logic 1 the interrupt is generated as a pulsed signal.

• If TI_TP is logic 0 the interrupt is permanently active signal that remains until MSF is

cleared.

Table 45.

Effect of bits MI and SI on pin INT and bit MSF

Result on INT

Result on MSF

no interrupt generated

MSF never set

an interrupt once per minute

MSF set when minutes counter increments

an interrupt once per second

MSF set when seconds counter increments

an interrupt once per second

MSF set when seconds counter increments

In this example, bit TI_TP is logic 1 and the MSF flag is not cleared after an interrupt.

Fig 20. INT example for SI and MI when TI_TP is logic 1

001aaf905

seconds counter

minutes counter

INT when SI enabled

MSF when SI enabled

INT when only MI enabled

MSF when only MI enabled

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