2003 Jan 27

13

Philips Semiconductors

Product specification

8-bit A/D and D/A converter

PCF8591

8.3

System configuration

A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls

the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’.

8.4

Acknowledge

The number of data bytes transferred between the start and stop conditions from transmitter to receiver is not limited.

Each data byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by

the transmitter whereas the master also generates an extra acknowledge related clock pulse. A slave receiver which is

addressed must generate an acknowledge after the reception of each byte. Also a master must generate an

acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that

acknowledges has to pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW

during the HIGH period of the acknowledge related clock pulse. A master receiver must signal an end of data to the

transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event the

transmitter must leave the data line HIGH to enable the master to generate a stop condition.

MBA605

MASTER

TRANSMITTER /

RECEIVER

SLAVE

RECEIVER

SLAVE

TRANSMITTER /

RECEIVER

MASTER

TRANSMITTER

MASTER

TRANSMITTER /

RECEIVER

SDA

SCL

Fig.14 System configuration.

handbook, full pagewidth

MBC602

S

START

condition

9

8

2

1

clock pulse for

acknowledgement

not acknowledge

acknowledge

DATA OUTPUT

BY TRANSMITTER

DATA OUTPUT

BY RECEIVER

SCL FROM

MASTER