MSP430F167IPMR datasheet(13/77 Pages) TI

13 / 77 page

MSP430F15x, MSP430F16x, MSP430F161x

MIXED SIGNAL MICROCONTROLLER

SLAS368G − OCTOBER 2002 − REVISED MARCH 2011

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

special function registers

Most interrupt and module-enable bits are collected in the lowest address space. Special-function register bits

not allocated to a functional purpose are not physically present in the device. This arrangement provides simple

software access.

interrupt enable 1 and 2

UTXIE0

OFIE

WDTIE

rw-0

Address

URXIE0

ACCVIE

NMIIE

rw-0

WDTIE:

Watchdog timer interrupt enable. Inactive if watchdog mode is selected.

Active if watchdog timer is configured as general-purpose timer.

OFIE:

Oscillator fault interrupt enable

NMIIE:

Nonmaskable interrupt enable

ACCVIE:

Flash memory access violation interrupt enable

URXIE0:

USART0: UART and SPI receive-interrupt enable

UTXIE0:

USART0: UART and SPI transmit-interrupt enable

UTXIE1

rw-0

Address

01h

URXIE1

URXIE1†:

USART1: UART and SPI receive interrupt enable

UTXIE1†:

USART1: UART and SPI transmit interrupt enable

† URXIE1 and UTXIE1 are not present in MSP430F15x devices.

interrupt flag register 1 and 2

UTXIFG0

OFIFG

WDTIFG

rw-0

rw-1

rw-(0)

Address

02h

URXIFG0

NMIIFG

rw-1

rw-0

WDTIFG:

Set on watchdog-timer overflow (in watchdog mode) or security key violation

Reset on VCC power-on, or a reset condition at the RST/NMI pin in reset mode

OFIFG:

Flag set on oscillator fault

NMIIFG:

Set via RST/NMI pin

URXIFG0:

USART0: UART and SPI receive flag

UTXIFG0:

USART0: UART and SPI transmit flag

UTXIFG1

rw-1

rw-0

Address

03h

URXIFG1

URXIFG1‡:

USART1: UART and SPI receive flag

UTXIFG1‡: USART1: UART and SPI transmit flag

‡ URXIFG1 and UTXIFG1 are not present in MSP430F15x devices.

MSP430F167IPMR 数据表(PDF) 13 Page - Texas Instruments

MSP430F167IPMR 数据表(HTML) 13 Page - Texas Instruments

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MSP430F167IPMR 数据表(PDF) 13 Page - Texas Instruments

MSP430F167IPMR 数据表(HTML) 13 Page - Texas Instruments

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