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MSP430F167IPMR 数据表(PDF) 19 Page - Texas Instruments

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部件名 MSP430F167IPMR
功能描述  MIXED SIGNAL MICROCONTROLLER
PDF  77 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

MSP430F167IPMR 数据表(HTML) 19 Page - Texas Instruments

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MSP430F15x, MSP430F16x, MSP430F161x
MIXED SIGNAL MICROCONTROLLER
SLAS368G − OCTOBER 2002 − REVISED MARCH 2011
19
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
Timer_B7 (MSP430F16x/161x only)
Timer_B7 is a 16-bit timer/counter with seven capture/compare registers. Timer_B7 can support multiple
capture/compares, PWM outputs, and interval timing. Timer_B7 also has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare
registers.
TIMER_B3/B7 SIGNAL CONNECTIONS†
INPUT PIN
NUMBER
DEVICE INPUT
SIGNAL
MODULE INPUT
NAME
MODULE BLOCK
MODULE OUTPUT
SIGNAL
OUTPUT PIN
NUMBER
43 - P4.7
TBCLK
TBCLK
ACLK
ACLK
Timer
NA
SMCLK
SMCLK
Timer
NA
43 - P4.7
TBCLK
INCLK
36 - P4.0
TB0
CCI0A
36 - P4.0
36 - P4.0
TB0
CCI0B
CCR0
TB0
ADC12 (internal)
DVSS
GND
CCR0
TB0
DVCC
VCC
37 - P4.1
TB1
CCI1A
37 - P4.1
37 - P4.1
TB1
CCI1B
CCR1
TB1
ADC12 (internal)
DVSS
GND
CCR1
TB1
DVCC
VCC
38 - P4.2
TB2
CCI2A
38 - P4.2
38 - P4.2
TB2
CCI2B
CCR2
TB2
DVSS
GND
CCR2
TB2
DVCC
VCC
39 - P4.3
TB3
CCI3A
39 - P4.3
39 - P4.3
TB3
CCI3B
CCR3
TB3
DVSS
GND
CCR3
TB3
DVCC
VCC
40 - P4.4
TB4
CCI4A
40 - P4.4
40 - P4.4
TB4
CCI4B
CCR4
TB4
DVSS
GND
CCR4
TB4
DVCC
VCC
41 - P4.5
TB5
CCI5A
41 - P4.5
41 - P4.5
TB5
CCI5B
CCR5
TB5
DVSS
GND
CCR5
TB5
DVCC
VCC
42 - P4.6
TB6
CCI6A
42 - P4.6
ACLK (internal)
CCI6B
CCR6
TB6
DVSS
GND
CCR6
TB6
DVCC
VCC
† Timer_B3 implements three capture/compare blocks (CCR0, CCR1 and CCR2 only).



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