TMP103CYFFT datasheet(11/23 Pages) TI

11 / 23 page

SCL

SDA

GND

V+

10nF

SupplyVoltage

TMP103

www.ti.com

SBOS545A

– FEBRUARY 2011 – REVISED MARCH 2011

TIMEOUT FUNCTION

The TMP103A sends data on the first byte and the

TMP103B sends data on the second byte. The

The TMP103 resets the serial interface if SCL is held

master must issue an acknowledge for each byte

low for 30ms (typ). The TMP103 releases the bus if it

read in order to read all of the TMP103 devices on

is pulled low and waits for a START condition. To

the bus; see Figure 15. If the master does not

avoid activating the timeout function, it is necessary

acknowledge each byte of data, the TMP103s stop

to maintain a communication speed of at least 1kHz

sending subsequent data for any remaining devices.

for SCL operating frequency.

Up to eight TMP103 devices can be on the same bus

and respond to MDA commands; see Table 9.

MULTIPLE DEVICE ACCESS

NOTE: If the bus contains an incomplete sequence of

The

TMP103

supports

Multiple

Device

Access

TMP103 device addresses, the master must transmit

(MDA), which allows the master to communicate with

all required dummy bytes for the missing device

multiple TMP103 devices on the same bus interface

address to allow for normal MDA read operation. For

with one interface transaction. MDA commands

example, if the TMP103A, TMP103B, and TMP103D

consist of an MDA read address (00000001) and an

devices are on the bus, the master must transmit an

MDA

write

address

(00000000).

The

device

MDA read address followed by four bytes and four

acknowledges the MDA address and responds to the

acknowledges in order to complete the MDA read

command accordingly. In order for MDA to function

transaction.

correctly, different product versions of the TMP103

must be used in the system; see Table 9.

NOISE

Multiple Device Access Write

The TMP103 is a very low-power device and

The master transmits an MDA write address followed

generates very low noise on the supply bus. Applying

by the pointer address of the register to be accessed;

an RC filter to the V+ pin of the TMP103 can further

see Table 2. Following the pointer, all of the TMP103

reduce any noise the TMP103 might propagate to

devices on the bus acknowledge and wait for the next

other components. RF in Figure 10 should be less

byte of data to be written to the addressed registers.

than 5k

Ω and CF should be greater than 10nF.

When the data byte is received by the TMP103

devices, they store and acknowledge the transmitted

byte. The TMP103s store the same data on all

devices on the bus in one transaction; see Figure 14.

Multiple Device Access Read

Note that before an MDA read transaction can begin,

the master must first send an MDA write transaction

in order to set the appropriate pointer address of the

section. The master can then transmit an MDA read

address followed by a read byte for each TMP103

used on the bus. For example, if a TMP103A and

TMP103B are used on the same bus and an MDA

read address is sent, the address must be followed

Figure 10. Noise Reduction

by two bytes of data and two master acknowledges.

Submit Documentation Feedback

Product Folder Link(s): TMP103

TMP103CYFFT 数据表(PDF) 11 Page - Texas Instruments

TMP103CYFFT 数据表(HTML) 11 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

数据表下载