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HMC960LP4E 数据表(PDF) 18 Page - Hittite Microwave Corporation |
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HMC960LP4E 数据表(HTML) 18 Page - Hittite Microwave Corporation |
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18 / 20 page ![]() 14 - 18 14 For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 978-250-3343 tel • 978-250-3373 fax • Order On-line at www.hittite.com Application Support: apps@hittite.com HMC960LP4E v00.0211 DC - 100 MHz DUAL DigitAL VAriAbLe gAin AMpLifier with DriVer DVDD = 5 V ±10%, GND = 0 V table 6. Main Spi timing Characteristics Parameter Conditions Min Typ Max Units t1 SDI to SCK Setup Time 8 nsec t2 SDI to SCK Hold Time 8 nsec t3 SCK High Duration [1] 10 nsec t4 SCK Low Duration 10 nsec t5 SEN Low Duration 20 nsec t6 SEN High Duration 20 nsec t7 SCK to SEN [2] 8 nsec t8 SCK to SDO out [3] 8 nsec [1] The SPI is relatively insensitive to the duty cycle of SCK. [2] SEN must rise after the 32nd falling edge of SCK but before the next rising SCK edge. If SCK is shared amongst several devices this timing must be respected. [3] Typical load to SDO is 10 pF, maximum 20 pF parallel port interface The HMC960LP4E features a seven bit parallel port to aid in real time gain selection. The dynamic performance of the parallel port is specified below. table 7. gain Control parallel port timing Characteristics Parameter Conditions Min. Typ. Max. Units f SSP Gain control switching rate 20 MHz t SSP Allowable skew between GC[6:0] input transitions 10 nsec |
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