数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

HMC960LP4E 数据表(PDF) 18 Page - Hittite Microwave Corporation

部件名 HMC960LP4E
功能描述  DC - 100 MHz DUAL Digital Variable Ga in AmplifieR with Driver
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  HITTITE [Hittite Microwave Corporation]
网页  http://www.hittite.com
标志 HITTITE - Hittite Microwave Corporation

HMC960LP4E 数据表(HTML) 18 Page - Hittite Microwave Corporation

Back Button HMC960LP4E Datasheet HTML 12Page - Hittite Microwave Corporation HMC960LP4E Datasheet HTML 13Page - Hittite Microwave Corporation HMC960LP4E Datasheet HTML 14Page - Hittite Microwave Corporation HMC960LP4E Datasheet HTML 15Page - Hittite Microwave Corporation HMC960LP4E Datasheet HTML 16Page - Hittite Microwave Corporation HMC960LP4E Datasheet HTML 17Page - Hittite Microwave Corporation HMC960LP4E Datasheet HTML 18Page - Hittite Microwave Corporation HMC960LP4E Datasheet HTML 19Page - Hittite Microwave Corporation HMC960LP4E Datasheet HTML 20Page - Hittite Microwave Corporation  
Zoom Inzoom in Zoom Outzoom out
 18 / 20 page
background image
14 - 18
14
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
978-250-3343 tel • 978-250-3373 fax • Order On-line at www.hittite.com
Application Support: apps@hittite.com
HMC960LP4E
v00.0211
DC - 100 MHz DUAL DigitAL
VAriAbLe gAin AMpLifier with DriVer
DVDD = 5 V ±10%, GND = 0 V
table 6. Main Spi timing Characteristics
Parameter
Conditions
Min
Typ
Max
Units
t1
SDI to SCK Setup Time
8
nsec
t2
SDI to SCK Hold Time
8
nsec
t3
SCK High Duration [1]
10
nsec
t4
SCK Low Duration
10
nsec
t5
SEN Low Duration
20
nsec
t6
SEN High Duration
20
nsec
t7
SCK to SEN [2]
8
nsec
t8
SCK to SDO out [3]
8
nsec
[1] The SPI is relatively insensitive to the duty cycle of SCK.
[2] SEN must rise after the 32nd falling edge of SCK but before the next rising SCK edge. If SCK is shared amongst several devices this timing must be
respected.
[3] Typical load to SDO is 10 pF, maximum 20 pF
parallel port interface
The HMC960LP4E features a seven bit parallel port to aid in real time gain selection. The dynamic performance of
the parallel port is specified below.
table 7. gain Control parallel port timing Characteristics
Parameter
Conditions
Min.
Typ.
Max.
Units
f
SSP
Gain control switching rate
20
MHz
t
SSP
Allowable skew between GC[6:0] input transitions
10
nsec



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com