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IPD50R520CP 数据表(PDF) 3 Page - Infineon Technologies AG |
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IPD50R520CP 数据表(HTML) 3 Page - Infineon Technologies AG |
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3 / 10 page ![]() IPD50R520CP Parameter Symbol Conditions Unit min. typ. max. Dynamic characteristics Input capacitance C iss - 680 - pF Output capacitance C oss -31- Effective output capacitance, energy related 6) C o(er) -29- Effective output capacitance, time related 7) C o(tr) -63- Turn-on delay time t d(on) -35- ns Rise time t r -14- Turn-off delay time t d(off) -80- Fall time t f -17- Gate Charge Characteristics Gate to source charge Q gs -3 - nC Gate to drain charge Q gd -5 - Gate charge total Q g -13 17 Gate plateau voltage V plateau - 5.2 - V Reverse Diode Diode forward voltage V SD V GS=0 V, I F=3.8 A, T j=25 °C - 0.9 1.2 V Reverse recovery time t rr - 240 - ns Reverse recovery charge Q rr - 1.6 - µC Peak reverse recovery current I rrm -13- A 1) J-STD20 and JESD22 2) Pulse width t p limited by T j,max 3) Repetitive avalanche causes additional power losses that can be calculated asP AV=E AR*f. 6) C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. 4) I SD≤I D, di /dt ≤400A/µs, V DClink=400V, V peak<V (BR)DSS, T j<T jmax, identical low and high side switch V R=400 V, I F=I S, di F/dt =100 A/µs 5) C o(er) is a fixed capacitance that gives the same stored energy as C oss while V DS is rising from 0 to 80% V DSS. Values V GS=0 V, V DS=100 V, f =1 MHz V DD=400 V, V GS=10 V, I D=3.8 A, R G=48.3 Ω V DD=400 V, I D=3.8 A, V GS=0 to 10 V V GS=0 V, V DS=0 V to 400 V Rev. 2.1 page 3 2008-04-10 |
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