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ADP150ACBZ-2.6-R7 数据表(PDF) 4 Page - Analog Devices

部件名 ADP150ACBZ-2.6-R7
功能描述  Ultralow Noise, 150 mA CMOS Linear Regulator
PDF  20 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP150ACBZ-2.6-R7 数据表(HTML) 4 Page - Analog Devices

  ADP150ACBZ-2.6-R7 Datasheet HTML 1Page - Analog Devices ADP150ACBZ-2.6-R7 Datasheet HTML 2Page - Analog Devices ADP150ACBZ-2.6-R7 Datasheet HTML 3Page - Analog Devices ADP150ACBZ-2.6-R7 Datasheet HTML 4Page - Analog Devices ADP150ACBZ-2.6-R7 Datasheet HTML 5Page - Analog Devices ADP150ACBZ-2.6-R7 Datasheet HTML 6Page - Analog Devices ADP150ACBZ-2.6-R7 Datasheet HTML 7Page - Analog Devices ADP150ACBZ-2.6-R7 Datasheet HTML 8Page - Analog Devices ADP150ACBZ-2.6-R7 Datasheet HTML 9Page - Analog Devices Next Button
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ADP150
Rev. A | Page 4 of 20
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
POWER SUPPLY REJECTION RATIO
(VIN = VOUT + 0.5 V)
PSRR
10 kHz, VIN = 3.8 V, VOUT = 3.3 V, IOUT = 10 mA
70
dB
10 kHz, VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA
70
dB
100 kHz, VIN = 3.8 V, VOUT = 3.3 V, IOUT = 10 mA
55
dB
100 kHz, VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA
55
dB
POWER SUPPLY REJECTION RATIO
(VIN = VOUT + 1 V)
10 kHz, VIN = 4.3 V, VOUT = 3.3 V, IOUT = 10 mA
70
dB
100 kHz, VIN = 4.3 V, VOUT = 3.3 V, IOUT = 10 mA
55
dB
1
Based on an end-point calculation using 1 mA and 150 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA.
2
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.2 V.
3
Start-up time is defined as the time between the rising edges of EN to VOUT being at 90% of its nominal value.
4
Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V or 2.7 V.
RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITOR
Table 2.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT AND OUTPUT CAPACITOR
Minimum Input and Output Capacitance1
CMIN
TA = −40°C to +125°C
0.7
µF
Capacitor ESR
RESR
TA = −40°C to +125°C
0.001
0.2
1
The minimum input and output capacitance should be greater than 0.7 µF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R-type and X5R-type capacitors are
recommended, and Y5V and Z5U capacitors are not recommended for use with any LDO.



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