PFS704 datasheet(8/30 Pages) POWERINT

8 / 30 page

Rev. D 12/11

PFS704-729EG

www.powerint.com

PI-5470-110810

~170 VAC

PFS704-716

~140 VAC

V < 48 µA

V > 59 µA

Figure 10. Line Dependant OCP.

to decay the power MOSFET on-time to zero. At peak power

E ~5 V) the shutdown time will be approximately 5 ms. The

internal error-voltage is held at 0 V for as long as the input peak

voltage is below the brown-in (I

UV+) threshold. The internal

error-voltage controlled slew to 0 V gradually reduces the switch

on-time to zero to deplete energy stored in the boost choke as

well as input EMI filter for power-down. Once the error-voltage

reaches zero volts the controller is effectively in an off-state

(gated by 5 ms timer) and will restart once all the conditions of

soft-start are satisfied.

The brown-out threshold is reduced to I

UV-SS during start-up until

the FEEDBACK pin exceeds approximately 5.8 V. Temporarily

reducing the brown-out threshold prevents false turn-off at high

power start-up when the voltage drop across the input bridge

rectifier and filter stage may cause the rectified input to sag

below the brown-out threshold.

Fast Output Voltage Overvoltage Protection (FB

OV)

The FEEDBACK pin features a means to detect an output

overvoltage condition through the FEEDBACK pin and disables

the power MOSFET until the sensed output voltage falls below

the FB

OV threshold. A deglitch filter (~2 ms) is used to prevent

the controller from falsely triggering this mode. An FB

OV event in

excess of the 2 ms delay will terminate the switch cycle immediately.

This detection circuit also includes some hysteresis.

Output Voltage Undervoltage Protection (FB

UV)

The FEEDBACK pin features an undervoltage detection to

detect an output overload or a broken feedback loop. If the IC

detects the falling edge on the FEEDBACK pin that has fallen

below FB

UV threshold, it will turn-off the internal power MOSFET

and reinitiate the start-up sequence. Similar to the FB

detection, this mode has a deglitch filter of approximately 100 ms.

VCC Undervoltage Protection (UVLO)

The BIAS POWER (VCC) pin has an undervoltage lock-out

protection which inhibits the IC from starting unless the applied

CC voltage is above the VCC+ threshold. The IC initiates a

soft-start once the VCC pin voltage exceeds the V

CC+ threshold.

After start-up the IC will continue to operate until the VCC pin

voltage has fallen below V

CC- level. The absolute maximum

voltage of the VCC pin is 13.4 V which must be externally limited

to prevent damage to the IC.

Over-Current Protection

The device includes a cycle-by-cycle over-current-protection

(OCP) mode which protects the device in the event of a

catastrophic fault. The OCP mode in the PFS704-716 is input

line dependent as shown in Figure 10. The intention of OCP in

this device is strictly protection of the internal power MOSFET

and is not intended to protect the converter from output

short-circuit or overload fault conditions.

The PFS704-716 controller latches the high line OCP for a 1/2

line cycle and updates the OCP status after the expiration of a

5 ms block-out timer. This feature has particular benefit for

hard-start after an AC line cycle drop where the peak detector

may falsely detect a low input line condition even though the

input is at high input line.

The leading edge blanking circuit inhibits the current limit

comparator for a short time (t

LEB) after the power MOSFET is

turned on. This leading edge blanking time must be set so that

current spikes caused by capacitance and rectifier reverse

recovery time will not cause premature termination of the

MOSFET conduction.

Safe Operating Range (SOA) Mode

Since the cycle-by-cycle OCP mechanism described above

does not prevent the possibility of inductor current “stair-

casing”, an SOA mode is required. Rapid build up of the device

current can occur in event of inductor saturation or when the

input and output voltages are equal (non or very short

inductor reset time).

The SOA mode is triggered whenever the device reaches

current limit (I

OCP) and the on-time is less than tSOA.

The SOA mode forces an off-time equal to t

OCP and pulls the

internal error-voltage (V

E) down to approximately 1/2 of its set

value.

Open FEEDBACK Pin Protection

The FEEDBACK pin also features a static current of I

FB that is

continuously sourced out of the pin to protect against a fault

related to an open FEEDBACK pin. The internal current source

introduces a static offset to the output regulation which must be

accounted for in selecting the output feedback regulation

components.

Hysteretic Thermal Shutdown

The thermal shutdown circuitry senses the controller die

temperature. The threshold is set at 118 °C typical with a 50 °C

hysteresis. When the die temperature rises above this threshold

(118 °C +8/-7 °C), the power MOSFET switching is disabled and

remains disabled until the die temperature falls by ~50 °C, at

which point the device will reinitiate a soft-start and start-up

sequence.

PFS704 数据表(PDF) 8 Page - Power Integrations, Inc.

PFS704 数据表(HTML) 8 Page - Power Integrations, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

数据表下载