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MIC5167 数据表(PDF) 2 Page - Micrel Semiconductor |
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MIC5167 数据表(HTML) 2 Page - Micrel Semiconductor |
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2 / 23 page ![]() Micrel, Inc. MIC5167 January 2012 2 M9999-012312-B Ordering Information Part Number Voltage Junction Temperature Range Package Lead Finish MIC5167YML Adjustable –40°C to +125°C 24-Pin 4x4 MLF ® Pb-Free Note: MLF ® is a GREEN RoHS-compliant package. Lead finish is NiPdAu. Mold compound is Halogen Free. Pin Configuration 24-Pin 4mm x 4mm MLF ® (ML) Pin Description Pin Number Pin Name Description 1, 6, 13, 18 PVIN Power Supply Voltage (Input): The PVIN pins are the input supply to the internal P-Channel Power MOSFET. A 22µF ceramic is recommended for bypassing at each PVIN pin. The SVIN pin must be connected to the PVIN pin. 2 EN/DLY Enable/Delay (Input): This pin is internally fed with a 1µA current source from SVIN. A delayed turn on is implemented by adding a capacitor to this pin. The delay is proportional to the capacitor value. The internal circuits are held off until EN/DLY reaches the enable threshold of 1.24V. This pin is pulled low when the input voltage is lower than the UVLO threshold. 3 VDDQ VDDQ (Input): VDDQ is connected to an internal precession divider which provides the reference voltage (VREF). 4 VREF VTT Reference (Output): This output provides an output of the internal reference voltage VDDQ/2. Connect a 100pF capacitor to ground at this pin. 5 PG PG (Output): This is an open drain output that indicates when the output voltage is within ±15% of its nominal voltage. The PG flag is asserted without delay when the enable is set low or when the output goes outside ±15% the window threshold. 14 FB Feedback (Input): Input to the error amplifier. 15 COMP Compensation pin (Input): The MIC5167 uses an internal compensation network containing a fixed-frequency zero (phase lead response) and pole (phase lag response) which allows the external compensation network to be much simplified for stability. The addition of a single capacitor and resistor to the COMP pin will add the necessary pole and zero for voltage mode loop stability using low value, low-ESR ceramic capacitors. 16 SGND Signal Ground: Internal signal ground for all low power circuits. |
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