MCM6341

3

MOTOROLA FAST SRAM

E1

E2

E3

G

W

Mode

I/O Pin

Cycle

Current

H

X

X

X

X

Not Selected

High–Z

—

ISB1, ISB2

X

L

X

X

X

Not Selected

High–Z

—

ISB1, ISB2

X

X

H

X

X

Not Selected

High–Z

—

ISB1, ISB2

L

H

L

H

H

Output Disabled

High–Z

—

IDDA

L

H

L

L

H

Read

Dout

Read

IDDA

L

H

L

X

L

Write

High–Z

Write

IDDA

Rating

Symbol

Value

Unit

Power Supply Voltage Relative to VSS

VDD

– 0.5 to + 5.0

V

Voltage Relative to VSS for Any Pin

Except VDD

Vin, Vout

– 0.5 to VDD + 0.5

V

Output Current (per I/O)

Iout

± 20

mA

Power Dissipation

PD

1.0

W

Temperature Under Bias

Commercial

Industrial

Tbias

– 10 to + 85

– 45 to + 90

°C

Storage Temperature — Plastic

Tstg

– 55 to + 150

°C

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are

exceeded. Functional operation should be restricted to RECOMMENDED OPER-

ATING CONDITIONS. Exposure to higher than recommended voltages for

extended periods of time could affect device reliability.

This device contains circuitry to protect the

inputs against damage due to high static volt-

ages or electric fields; however, it is advised

that normal precautions be taken to avoid ap-

plication of any voltage higher than maximum

rated voltages to these high–impedance circuits.

This CMOS memory circuit has been

designed to meet the dc and ac specifications

shown in the tables, after thermal equilibrium

has been established. The circuit is in a test

socket or mounted on a printed circuit board and

transverse air flow of at least 500 linear feet per

minute is maintained.