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LMV321 数据表(PDF) 12 Page - Cadeka Microcircuits LLC. |
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LMV321 数据表(HTML) 12 Page - Cadeka Microcircuits LLC. |
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12 / 15 page ![]() Data Sheet ©2009-2012 CADEKA Microcircuits, LLC www.cadeka.com 12 Application Information General Description The LMV321 is a single supply, general purpose, voltage- feedback amplifier fabricated on a CMOS process. The LMV321 offers 1MHz gain bandwidth product, >1V/ s slew rate, and only 130 A supply current. It features a rail-to-rail output stage and is unity gain stable. The common mode input range extends to 200mV below ground and to 800mV below Vs. Exceeding these values will not cause phase reversal. However, if the input voltage exceeds the rails by more than 0.5V, the input ESD devices will begin to conduct. The output will stay at the rail during this overdrive condition. The output stage is short circuit protected and offers “soft” saturation protection that improves recovery time.Figures 1, 2, and 3 illustrate typical circuit configurations for non- inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations. Figure 4 shows the typical non-inverting gain circuit for single supply applications + - Rf 0.1µF 6.8µF Output G = 1 + (Rf/Rg) Input +Vs -Vs Rg 0.1µF 6.8µF RL Figure 1. Typical Non-Inverting Gain Circuit + - Rf 0.1µF 6.8µF Output G = - (Rf/Rg) For optimum input offset voltage set R1 = Rf || Rg Input +Vs -Vs 0.1µF 6.8µF RL Rg R1 Figure 2. Typical Inverting Gain Circuit + - 0.1µF 6.8µF Output G = 1 Input +Vs -Vs 0.1µF 6.8µF RL Figure 3. Unity Gain Circuit + - Rf 0.1µF 6.8µF Output Input +Vs Rg RL Figure 4. Single Supply Non-Inverting Gain Circuit Power Dissipation Power dissipation should not be a factor when operating under the stated 2k load condition. However, applications with low impedance, DC coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond it’s intended operating range. Maximum power levels are set by the absolute maximum junction rating of 150°C. To calculate the junction temperature, the package thermal resistance value ThetaJA ( JA) is used along with the total die power dissipation. TJunction = TAmbient + ( JA × PD) Where TAmbient is the temperature of the working environment. In order to determine PD, the power dissipated in the load needs to be subtracted from the total power delivered by |
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