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ADR435 数据表(PDF) 3 Page - Analog Devices |
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ADR435 数据表(HTML) 3 Page - Analog Devices |
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3 / 48 page  Data Sheet AD5735 Rev. B | Page 3 of 48 DETAILED FUNCTIONAL BLOCK DIAGRAM AD5735 AVSS –15V AGND AVDD +15V AVCC 5.0V DVDD DGND LDAC CLEAR SCLK SDIN SYNC SDO FAULT DC-TO-DC CONVERTER DYNAMIC POWER CONTROL INPUT SHIFT REGISTER AND CONTROL STATUS REGISTER POWER-ON RESET REFERENCE BUFFERS DAC REG A DAC INPUT DATA REG A VREF WATCHDOG TIMER (SPI ACTIVITY) VOUT RANGE SCALING ALERT REFOUT REFIN AD1 AD0 DAC A 12 12 SWA VBOOST_A GAIN REG A OFFSET REG A R1 R2 R3 RSET_A VOUT_A IOUT_B, IOUT_C, IOUT_D RSET_B, RSET_C, RSET_D ±VSENSE_B, ±VSENSE_C, ±VSENSE_D VOUT_B, VOUT_C, VOUT_D IOUT_A +VSENSE_A –VSENSE_A DAC CHANNEL B DAC CHANNEL A DAC CHANNEL C DAC CHANNEL D SWB, SWC, SWD VBOOST_B, VBOOST_C, VBOOST_D 7.4V TO 29.5V VSEN1 VSEN2 + 30k Ω Figure 2. |
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