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ADL5202ACPZ-R7 数据表(PDF) 1 Page - Analog Devices

部件名 ADL5202ACPZ-R7
功能描述  Wide Dynamic Range, High Speed
PDF  32 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL5202ACPZ-R7 数据表(HTML) 1 Page - Analog Devices

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Wide Dynamic Range, High Speed,
Digitally Controlled VGA
Data Sheet
ADL5202
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
FEATURES
Dual independent, digitally controlled VGAs
−11.5 dB to +20 dB gain range
0.5 dB
± 0.1 dB step size
150 Ω differential input and output
7.5 dB noise figure at maximum gain
OIP3 > 50 dBm at 200 MHz
−3 dB upper frequency bandwidth of 700 MHz
Multiple control interface options
Parallel 6-bit control interface (with latch)
Serial peripheral interface (SPI) (with fast attack)
Gain up/down mode
Wide input dynamic range
Low power mode option
Power-down control
Single 5 V supply operation
40-lead, 6 mm × 6 mm LFCSP package
APPLICATIONS
Differential ADC drivers
High IF sampling receivers
High output power IF amplification
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
+20dB
GND
VPOS
VINA+
VINA–
0dB TO 31.5dB
150Ω
150Ω
150Ω
150Ω
SIDE A
SPI WITH FA,
PARALLEL WITH LATCH,
UP/DN
SIDE B
SPI WITH FA,
PARALLEL WITH LATCH,
UP/DN
VOUTA+
VOUTA–
ADL5202
PM
MODE0,
MODE1
+20dB
VINB+
VINB–
VOUTB+
VOUTB–
0dB TO 31.5dB
LOGIC
LOGIC
CONTROL
CIRCUITRY
PWUPA
PWUPB
Figure 1.
GENERAL DESCRIPTION
The ADL5202 is a digitally controlled, variable gain, wide band-
width amplifier that provides precise gain control, high output
IP3, and low noise figure. The excellent distortion performance
and high signal bandwidth make the ADL5202 an excellent gain
control device for a variety of receiver applications. The
ADL5202 also incorporates a low power mode option that
lowers the supply current.
For wide input dynamic range applications, the ADL5202
provides a broad 31.5 dB gain range with 0.5 dB resolution. The
gain is adjustable through multiple gain control interface options:
parallel, serial peripheral interface, and up/down.
Incorporating proprietary distortion cancellation techniques,
the ADL5202 achieves a better than 50 dBm output IP3 at
frequencies approaching 200 MHz for most gain settings.
The ADL5202 is powered on by applying the appropriate logic
level to the PWUPx pins. The quiescent current of the ADL5202
is typically 160 mA in low power mode. When configured in high
performance mode for more demanding applications, the quiescent
current is 210 mA. When powered down, the ADL5202 consumes
less than 14 mA and offers excellent input-to-output isolation.
The gain setting is preserved during power-down.
Fabricated on an Analog Devices, Inc., high speed SiGe process,
the ADL5202 provides precise gain adjustment capabilities with
good distortion performance and low phase error. The ADL5202
amplifier comes in a compact, thermally enhanced 40-lead,
6 mm × 6 mm LFCSP package and operates over a temperature
range of −40°C to +85°C.


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