数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADP223ACPZ-R7 数据表(PDF) 5 Page - Analog Devices

部件名 ADP223ACPZ-R7
功能描述  Dual, 300 mA Output, Low Noise
PDF  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP223ACPZ-R7 数据表(HTML) 5 Page - Analog Devices

  ADP223ACPZ-R7 Datasheet HTML 1Page - Analog Devices ADP223ACPZ-R7 Datasheet HTML 2Page - Analog Devices ADP223ACPZ-R7 Datasheet HTML 3Page - Analog Devices ADP223ACPZ-R7 Datasheet HTML 4Page - Analog Devices ADP223ACPZ-R7 Datasheet HTML 5Page - Analog Devices ADP223ACPZ-R7 Datasheet HTML 6Page - Analog Devices ADP223ACPZ-R7 Datasheet HTML 7Page - Analog Devices ADP223ACPZ-R7 Datasheet HTML 8Page - Analog Devices ADP223ACPZ-R7 Datasheet HTML 9Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 24 page
background image
Data Sheet
ADP222/ADP223/ADP224/ADP225
Rev. B | Page 5 of 24
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Rating
VIN to GND
−0.3 V to +6 V
ADJ1, ADJ2, VOUT1, VOUT2 to GND
−0.3 V to VIN
EN1, EN2 to GND
−0.3 V to +6 V
Storage Temperature Range
−65°C to +150°C
Operating Junction Temperature Range
−40°C to +125°C
Soldering Conditions
JEDEC J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination.
The ADP222/ADP223/ADP224/ADP225 can be damaged when
the junction temperature limits are exceeded. Monitoring
ambient temperature does not guarantee that TJ is within the
specified temperature limits. In applications with high power
dissipation and poor thermal resistance, the maximum ambient
temperature may have to be derated. In applications with
moderate power dissipation and low PCB thermal resistance, the
maximum ambient temperature can exceed the maximum limit as
long as the junction temperature is within specification limits.
The junction temperature (TJ) of the device is dependent on the
ambient temperature (TA), the power dissipation of the device
(PD), and the junction-to-ambient thermal resistance of the
package (θJA). Maximum junction temperature (TJ) is calculated
from the ambient temperature (TA) and power dissipation (PD)
using the formula
TJ = TA + (PD × θJA)
Junction-to-ambient thermal resistance (θJA) of the package is
based on modeling and calculation using a 4-layer board. θJA
is highly dependent on the application and board layout. In
applications where high maximum power dissipation exists,
close attention to thermal board design is required. The value
of θJA may vary, depending on PCB material, layout, and
environmental conditions. The specified value of θJA is based
on a 4-layer, 4 in × 3 in, 2½ oz copper board, as per JEDEC
standards. For more information, see the AN-772 Application
Note, A Design and Manufacturing Guide for the Lead Frame
Chip Scale Package (LFCSP).
ΨJB is the junction-to-board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a 4-layer board. The JESD51-12, Guidelines for
Reporting and Using Package Thermal Information, states that
thermal characterization parameters are not the same as thermal
resistances. ΨJB measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θJB. Therefore, ΨJB thermal paths include
convection from the top of the package as well as radiation from
the package, factors that make ΨJB more useful in real-world
applications. Maximum junction temperature (TJ) is calculated
from the board temperature (TB) and power dissipation (PD)
using the formula
TJ = TB + (PD × ΨJB)
Refer to JESD51-8 and JESD51-12 for more detailed
information about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
θJA
θJC
ΨJB
Unit
8-Lead 2 mm × 2 mm LFCSP
50.2
31.7
18.2
°C/W
ESD CAUTION



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com