ADP222/ADP223/ADP224/ADP225

Data Sheet

Rev. B | Page 18 of 24

APPLICATIONS INFORMATION

CAPACITOR SELECTION

Output Capacitor

The ADP222/ADP223/ADP224/ADP225 are designed for

operation with small, space-saving ceramic capacitors but

function with most commonly used capacitors as long as care is

taken with regard to the effective series resistance (ESR) value.

The ESR of the output capacitor affects the stability of the LDO

control loop. A minimum of 0.7 µF capacitance with an ESR of

1 Ω or less is recommended to ensure the stability of the ADP222/

ADP223/ADP224/ADP225. Transient response to changes in

load current is also affected by output capacitance. Using a

larger value of output capacitance improves the transient response

of the ADP222/ADP223/ADP224/ADP225 to large changes in

load current. Figure 65 shows the transient responses for an

output capacitance value of 1 µF.

A CH1

200mA

1

M10µs

3

2

CH2 50mV

B

W

B

W

Ω

B

W

LOAD CURRENT

Input Bypass Capacitor

Connecting a 1 µF capacitor from VIN to GND reduces the

circuit sensitivity to the printed circuit board (PCB) layout,

especially when long input traces or high source impedance

are encountered. If greater than 1 µF of output capacitance is

required, the input capacitor should be increased to match it.

Input and Output Capacitor Properties

Any good quality ceramic capacitors can be used with the

ADP222/ADP223/ADP224/ADP225, as long as they meet the

minimum capacitance and maximum ESR requirements.

Ceramic capacitors are manufactured with a variety of

dielectrics, each with different behavior over temperature and

applied voltage. Capacitors must have a dielectric adequate to

ensure the minimum capacitance over the necessary temperature

range and dc bias conditions. X5R or X7R dielectrics with a

voltage rating of 6.3 V or 10 V are recommended, but Y5V and

Z5U dielectrics are not recommended, due to their poor

temperature and dc bias characteristics.

Figure 66 depicts the capacitance vs. voltage bias characteristic

of an 0402, 1 µF, 10 V, X5R capacitor. The voltage stability of a

capacitor is strongly influenced by the capacitor size and voltage

rating. In general, a capacitor in a larger package or higher voltage

rating exhibits better stability. The temperature variation of the

X5R dielectric is ~±15% over the −40°C to +85°C temperature

range and is not a function of package or voltage rating.

1.2

1.0

0.8

0.6

0.4

0.2

0

0

2

4

6

8

10

VOLTAGE (V)

Figure 66. Capacitance vs. Voltage Bias Characteristic

Use Equation 1 to determine the worst-case capacitance accounting

for capacitor variation over temperature, component tolerance,

and voltage.

(1)

where:

TEMPCO is the worst-case capacitor temperature coefficient.

TOL is the worst-case component tolerance.

In this example, the worst-case temperature coefficient (TEMPCO)

over −40°C to +85°C is assumed to be 15% for an X5R dielectric.

The tolerance of the capacitor (TOL) is assumed to be 10%, and

Substituting these values in Equation 1 yields

Therefore, the capacitor chosen in this example meets the

minimum capacitance requirement of the LDO over temperature

and tolerance at the chosen output voltage.

To guarantee the performance of the ADP222/ADP223/

ADP224/ADP225, it is imperative that the effects of dc bias,

temperature, and tolerances on the behavior of the capacitors

be evaluated for each application.