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AS1153, AS1157

Datasheet - Detailed Descr i p ti on

8 Detailed Description

The AS1153, AS1157 are 260Mbps, dual-channel LVDS receivers intended for high-speed, point-to-point, low-power applications. Each inde-

pendent channel accepts and converts an LVDS input to an LVTTL/LVCMOS output. The devices are capable of detecting differential signals

from 100mV to 1V within an input voltage range of 0 to 2.4V.

The 250 to 450mV differential output of an LVDS driver is nominally centered around 1.25V. Due to the receiver input voltage range, a ±1V volt-

age shift in the signal relative to the receiver is allowed. Thus, a difference in ground references of the transmitter and the receiver, as well as the

common mode effect of coupled noise, can be tolerated.

LVDS Interface

The LVDS Interface Standard is a signaling method defined for point-to-point communication over a controlled-impedance medium as defined by

the ANSI TIA/EIA-644 and IEEE 1596.3 standards. The LVDS standard uses a lower voltage swing than other common communication stan-

dards, resulting in higher data rates, reduced power consumption and EMI emissions, and less susceptibility to noise.

The devices fully comply with the LVDS standard input voltage range of 0 to +2.4V referenced to receiver ground.

The AS1157 has an integrated termination resistors connected internally across each receiver input. This internal termination saves board

space, eases layout, and reduces stub length compared to an external termination resistor. In other words, the transmission line is terminated on

the IC.

Failsafe Circuit

The devices contain an integrated Failsafe circuit to prevent noise at inputs that are open, undriven and terminated, or undriven and shorted.

Open or undriven terminated input conditions can occur if there is a cable failure or when the LVDS driver outputs are high impedance. A short

condition also can occur because of a cable failure. The Failsafe circuit of the AS1153, AS1157 automatically sets the output high if any of these

conditions are true.

inputs are open, undriven and shorted, or undriven and parallel terminated, there is no input current. In this case, a pullup resistor in the Failsafe

Figure 18. Failsafe Input Circuit

AS1157

AS1153

INx-

OUTx

INx+

INx-

OUTx

INx+