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AS1153_V2 数据表(PDF) 11 Page - ams AG

部件名 AS1153_V2
功能描述  Dual LVDS Receiver
PDF  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AMSCO [ams AG]
网页  http://www.ams.com
标志 AMSCO - ams AG

AS1153_V2 数据表(HTML) 11 Page - ams AG

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www.austriamicrosystems.com/Interfaces-LVDS/AS1153
Revision 1.02
11 - 16
AS1153, AS1157
Datasheet - Applications
Cables and Connectors
Supported transmission media include printed circuit board traces, backplanes, and cables.
Use cables and connectors with matched differential impedance (typically 100
Ω) to minimize impedance mismatches.
Balanced cables such as twisted pair offer superior signal quality and tend to generate less EMI due to magnetic field canceling effects. Bal-
anced cables pick up noise as common mode, which is rejected by the LVDS receiver.
Avoid the use of unbalanced cables such as ribbon cable or simple coaxial cable.
Termination
Due to the high data rates of LVDS drivers, matched termination will prevent the generation of any signal reflections, and reduce EMI.
The AS1157 has integrated termination resistors connected across the inputs of each receiver. The value of the integrated resistor is speci-
fied in Table 3.
The AS1153 requires an external termination resistor. The termination resistor should match the differential impedance of the transmission
line and be placed as close to the receiver inputs as possible. Termination resistance values may range between 90 to 132
Ω depending on
the characteristic impedance of the transmission medium. Use 1% surface-mount resistors.
Board Layout
The device should be placed as close to the interface connector as possible to minimize LVDS trace length.
Keep the LVDS and any other digital signals separated from each other to reduce crosstalk.
Use a four-layer PC board that provides separate power, ground, LVDS signals, and input signals.
Isolate the input LVDS signals from each other and the output LVCMOS/LVTTL signals from each other to prevent coupling.
Separate the input LVDS signals from the output signals planes with the power and ground planes for best results.
Figure 20. Propagation Delay and Transition Time Test Circuit
INx+
50
Ω
50
Ω
INx-
OUTx
CL
Pulse
Generator**
* 50
Ω required for pulse generator.
** When testing the AS1157, adjust the pulse generator output
to account for internal termination resistor.
Receiver
AS1153, AS1157



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