AS8530-ASOT datasheet(9/32 Pages) AMSCO

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AS8530

Datasheet - Electrical Character i s t ics

6.5.2 AC Electrical Characteristics

LIN Driver, Bus load conditions (CBUS ; RBUS): 1nF; 1kΩ / 6,8nF; 660Ω / 10nF; 500Ω

Note:

Sleep-mode to Normal mode transition is identical to the Power-ON sequence after the remote wakeup event on LIN bus. The

transition time will include the tRes (RESET time) and start-up time for the LDO.

Symbol

Conditions

Min

Typ

Max

Units

(worst case 20Kbps transmission)

Vth_rec(max) = 0.744 x VSUP;

Vth_dom(max) = 0.581 x VSUP;

VSUP = 6.0V to 18V; tbit = 50μs;

D1 = tbus_rec(min) / (2 x tbit)

0.369

(worst case 20kbps transmission)

Vth_rec (min) = 0.422 x VSUP;

Vth_dom (min) = 0.284 x VSUP;

VSUP = 6V to 18V; tbit = 50μs;

D2 = tbus_rec(max) / (2 x tbit)

0.581

(worst case 10.4kbps transmission)

Vth_rec (max) = 0.778 x VSUP;

Vth_dom (max) = 0.616 x VSUP;

VSUP = 6.0V to 18V; tbit = 96μs;

D3 = tbus_rec(min) / (2 x tbit)

0.417

(worst case 10.4kbps transmission)

Vth_rec (min) = 0.389 x VSUP;

Vth_dom (min) = 0.251 x VSUP;

VSUP = 6V to18V; tbit = 96μs;

D4 = tbus_rec(max) / (2 x tbit)

0.59

tdLR

VCC = 5V;

Propagation delay bus dominant to RX LOW

6µs

tdHR

VCC = 5V;

Propagation delay bus dominant to RX HIGH

6µs

tRS

Receiver Delay symmetry

-2

µs

twake

Wake-up delay time

150

µs

tsln

Transition from standby mode to normal mode

(clock frequency is 128kHz ± 25%)

Clock cycles

tnsl

Transition from normal mode to standby mode

(clock frequency is 128kHz ± 25%)

Clock cycles

trec_deb

Receiver De-bounce time

µs

Cint

Guaranteed by design

220

250

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