数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

AR4100 数据表(PDF) 22 Page - Freescale Semiconductor, Inc

部件名 AR4100
功能描述  Low power modes consuming as little as 5 關A of current
PDF  29 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

AR4100 数据表(HTML) 22 Page - Freescale Semiconductor, Inc

Back Button AR4100 Datasheet HTML 18Page - Freescale Semiconductor, Inc AR4100 Datasheet HTML 19Page - Freescale Semiconductor, Inc AR4100 Datasheet HTML 20Page - Freescale Semiconductor, Inc AR4100 Datasheet HTML 21Page - Freescale Semiconductor, Inc AR4100 Datasheet HTML 22Page - Freescale Semiconductor, Inc AR4100 Datasheet HTML 23Page - Freescale Semiconductor, Inc AR4100 Datasheet HTML 24Page - Freescale Semiconductor, Inc AR4100 Datasheet HTML 25Page - Freescale Semiconductor, Inc AR4100 Datasheet HTML 26Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 22 / 29 page
background image
MKG-16487 Ver. 5.0
22
Qualcomm Atheros, Inc.
MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION
AR4100 System in Package 802.11n– General Availability Data Sheet
Pin Assignments and Descriptions
Table 5-3
Signal-to-Pin Relationships and Descriptions
Signal Name
Pin
Type
Reset
State
I/O Pad Supply
Domain
Description
Digital Control
HMODE0
T7
I
X
VDDIO
WiFi host mode select, see design guide for
configuration details, floating input must be
tied high or low.
HMODE1
R7
I
X
VDDIO
WiFi host mode select, see design guide for
configuration details, floating input must be
tied high or low.
CHIP_PWD_L
T11
I, PD
Low
HOST_POWER WLAN Power Down
0
Power down
1
WLAN awake
Host Interface (SPI Mode)
SPI_MOSI
D1
I/O
PU
HOST_POWER SPI data Input
SPI_CLK
J1
I
X
HOST_POWER SPI clock must be driven.
SPI_MISO
H1
I/O
PU
HOST_POWER SPI data output
SPI_INT
G1
I/O
PU
HOST_POWER SPI interrupt
SPI_CS
E1
I/O
PU
HOST_POWER SPI chip select
Master SPI Flash Interface
SPIM_CLK
P2
I/O
X
VDDIO
Master SPI clock for SPI flash interface
SPIM_CS_N
M2
I/O
High
VDDIO
Master SPI chip select for SPI flash interface
SPIM_MISO
N2
I/O
High
VDDIO
Master SPI data input for SPI flash interface
SPIM_MOSI
R2
I/O
X
VDDIO
Master SPI data output for SPI flash interface
RF Port
WIFI_RF
T4
A_I/O
N/A
N/A
RF antenna port
System Test
DEBUG_
UART_RXD
T10
I/O
Low
VDDIO
Reconfigured after software download as
debugging UART RXD
DEBUG_
UART_TXD
T6
O
High
VDDIO
Reconfigured after software download as
debugging UART TXD
TMS
T8
I, PU
High
VDDIO
WiFi JTAG TMS
Used with debugging only
TCK
T9
I, PU
High
VDDIO
WiFi JTAG TCK
Used with debugging only
TDI
R9
I, PU
High
VDDIO
WiFi JTAG TDI
Used with debugging only



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com