MKG-16487 Ver. 5.0

8

Qualcomm Atheros, Inc.

MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION

AR4100 System in Package 802.11n– General Availability Data Sheet

Features Summary

2.4 Manufacturing Calibration

The AR4100 uses internal self-calibration and BIST (built-in self test) circuits to maintain optimal

performance over temperature, time and process variation. The AR4100 is delivered fully tested

and does not require any customer manufacturing line calibration.

2.5 Internal One-Time Programmable Memory

The AR4100 includes internal one-time programmable memory which is used to store the device

MAC address. This OTP memory must be programmed during the customer manufacturing flow

with a MAC address. Tools and application notes are provided to enable customers to integrate this

into their manufacturing flow.

2.6 Reference Frequency

The AR4100 incorporates an integrated 26 MHz crystal.

2.7 Internal Sleep Clock

The AR4100 incorporates integrated on-chip low power sleep clocks to regulate internal timing,

eliminating the need for any external 32 KHz real time clocks or crystal oscillators.

2.8 Interfaces

The AR4100 supports a variety of interfaces for supporting host interface options, and external

memory interface options.

2.8.1

Standard Host Interface

The AR4100 supports a generic SPI (GSPI) slave port when interfacing to a host MCU.

2.8.2

Firmware Loading and Other Interfaces

GSPI master for interfacing to an external NVMEM for firmware load into the AR4100 upon

powerup.