MCM69C232

6

MOTOROLA FAST SRAM

CONTROL PORT AND MATCH PORT TIMINGS

(Voltages Referenced to VSS = 0 V, Max’s are tKHKH Dependent and Listed Values are for tKHKH = 20 ns)

Parameter

Symbol

Min

Max

Unit

MATCH PORT TIMING

Clock Cycle Time

tKHKH

20

250

ns

Clock High Time

tKHKL

8

242

ns

Clock Low Time

tKLKH

8

242

ns

Clock High to LHSM or LL Low

tKHLL

—

7

ns

Clock High to LHSM or LL High

tKHLH

—

7

ns

MQ Input Data Setup Time to Clock High

tMQVKH

8

—

ns

Clock High to Match Data Hold Time

tKHMQX

2

—

ns

Clock High to MQ Valid

tKHMQV

—

12

ns

Clock High to MC High

tKHMCH

—

5

ns

Clock High to MC Low

tKHMCL

—

5

ns

Clock High to MS Low

tKHMSL

—

12

ns

Clock High to MS High

tKHMSH

—

5

ns

Clock High to VPC Low

tKHVPL

—

12

ns

Clock High to VPC High

tKHVPH

—

5

ns

G Low to MQ Active

tGLMQX

3.8

—

ns

G High to MQ High–Z

tGHMQZ

—

4

ns

LH/SM Low to LH/SM Low

tSMSM

10

—

cycles

Figure 1. AC Test Loads

OUTPUT

Z0 = 50 Ω

RL = 50 Ω

VL = 1.5 V

Figure 2. Pullup for Open Drain Outputs

MCM69C232 OUTPUT PIN

3.3 V

FANOUT TO LOAD DEVICES

RH

NOTES:

1. For IRQ, DTACK, MS, MC, and VPC, RH = 200 Ω .

2. If multiple MCM69C232s are used, RH should be placed as

close to the load devices as possible.