9

SP334DS/10

Programmable RS-232/RS-485 Transceiver

© Copyright 2000 Sipex Corporation

Figure 15. Charge Pump Phase 3.

Figure 16. Charge Pump Phase 4.

operation the relative position and functionality

of the drivers are set up to accommodate the

selected interface mode. As the mode of the

drivers is changed, the electrical characteristics

will change to support the requirements of clock,

data, and control line signal levels. Unused

driver inputs can be left floating; however, to

ensure a desired state with no input signal,

pull–up resistors to +5V or pull–down resistors

to ground are suggested. Since the driver inputs

are both TTL or CMOS compatible, any value

resistor less than 100k

Ω will suffice.

When in RS-232 mode, the single-ended RS-

232 drivers produce compliant RS-232E and

ITU V.28 signals. Each of the three drivers

output single-ended bipolar signals in excess of

–5V

+5V

–5V

+

+

++

–

–

–

–

+10V

+

+

++

–

–

–

–

Figure 17. Charge Pump Waveforms

±5V with a full load of 3kΩ and 2500pF applied

as specified. These drivers can also operate at

least 120kbps.

When programmed to RS-485 mode, the

differential RS-485 drivers produce complaint

RS-485 signals. Each RS-485 driver outputs

a unipolar signal on each output pin with a

magnitude of at least 1.5V while loaded with

a worst case of 54

Ω between the driver's two

output pins. The signal levels and drive

capability of the RS-485 drivers allow the

drivers to also comply with RS-422 levels. The

transmission rate for the differential drivers is

10Mbps.

Receivers

The SP334 has five single-ended receivers

when programmed for RS-232 mode and two

differential receivers when programmed for

RS-485 mode.

Control for the mode selection is done by the

same select pin as the drivers. As the operating

mode of the receivers is changed, the electrical

characteristics will change to support the

requirements of the appropriate serial standard.

Unused receiver inputs can be left floating

without causing oscillation. To ensure a desired

state of the receiver output, a pull–up resistor of

100k

Ω to +5V should be connected to the

inverting input for a logic low, or the

non–inverting input for a logic high. For

single-ended receivers, a pull–down resistor to

ground of 5k

Ω is internally connected, which

will ensure a logic high output.

+10V

a) C

GND

GND

-10V

b) C