SP791DS/08

SP791 Low Power Microprocessor Supervisory with Battery Switch-Over

© Copyright 2000 Sipex Corporation

4

PARAMETER

MIN

TYP

MAX

UNITS

CONDITIONS

WDI Threshold Voltage

0.75 X V

CC

VV

IH

(Note 4)

0.8

V

IL

WDI Input Current

-50

-10

µA

WDI = 0V

20

50

WDI = V

OUT

POWER FAIL COMPARATOR

PFI Input Threshold

1.20

1.25

1.30

V

V

PFI Leakage Current

+0.01

+25

nA

PFO Output Voltage

0.4

V

I

3.5

I

PFO Short-Circuit Current

60

mA

Output sink current

1

15

100

µA

Output source current

PFI-to-PFO Delay

15

µs

V

55

V

CHIP-ENABLE GATING

+0.005

+1

µA

Disabled mode

65

150

Ω

Enabled mode

(Note 5)

0.1

0.75

2.0

mA

Disabled mode, CE OUT = 0V

(Reset Active)

6

10

ns

50

Ω source impedance driver,

Delay (Note 6)

C

3.5

V

V

(Reset Active)

2.7

V

15

µs

Power down

MANUAL RESET INPUT

MR Minimum Pulse Width

25

15

µs

MR-to-RESET

7

µs

Propagation Delay

MR Threshold

1.25

V

V

MR Pull-Up Current

23

250

µA

MR = 0V

Note 1: Either V

greater than 2.0V.

Note 2: The supply current drawn by the SP791 from the

battery (excluding I

- 1V) < V

period as V

Note

3:

"+"

=

battery-discharging

current,

"-" = battery-charging current.

Note 4: WDI is internally connected to a voltage divider

between V

1.6V (typ), disabling the watchdog function.

ELECTRICAL CHARACTERISTICS (continued)

Note 5: The chip-enable resistance is tested with V

4.75V :: V

Note 6: The chip-enable propagation delay is measured

from the 50% point at CE IN to the 50% point at CE