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SM320DM6446 数据表(PDF) 11 Page - Texas Instruments |
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SM320DM6446 数据表(HTML) 11 Page - Texas Instruments |
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11 / 228 page  2.3.8.2 External Memories 2.3.8.3 DSP Memories 2.3.8.4 ARM-DSP Integration 2.3.9 Peripherals 2.3.10 PLL Controller (PLLC) 2.3.11 Power and Sleep Controller (PSC) SM320DM6446 Digital Media System-on-Chip www.ti.com SPRS607A – JUNE 2009 – REVISED JUNE 2009 The ARM has access to the following external memories: • DDR2 Synchronous DRAM • Asynchronous EMIF / NOR Flash / NAND Flash • ATA/CF • Flash card devices: – MMC/SD with SDIO – xD – SmartMedia The ARM has access to the following DSP memories: • L2 RAM • L1P RAM • L1D RAM DM6446 ARM and DSP integration features are as follows: • DSP visibility from ARM’s memory map, see Section 2.5, Memory Map Summary, for details • Boot Modes for DSP - see Device Configurations section, Section 3.3.3, DSP Boot, for details • ARM control of DSP boot / reset - see Device Configurations section, Section 3.3.2, ARM Boot, for details • ARM control of DSP isolation and powerdown / powerup - see Section 3, Device Configurations, for details • ARM & DSP Interrupts - see Section 6.7.1, ARM CPU Interrupts, and Section 6.7.2, DSP Interrupts, for details The ARM9 has access to all of the peripherals on the DM6446 device with the exception of the VICP. The ARM Subsystem includes the PLL Controller. The PLL Controller contains a set of registers for configuring DM6446’s two internal PLLs (PLL1 and PLL2). The PLL Controller provides the following configuration and control: • PLL Bypass Mode • Set PLL multiplier parameters • Set PLL divider parameters • PLL power down • Oscillator power down The PLLs are briefly described in this document in the Clocking section. For more detailed information on the PLLs and PLL Controller register descriptions, see Section 2.8.3, Documentation Support, of this document for the TMS320DM644x ARM Subsystem Reference Guide (literature number SPRUE14). The ARM Subsystem includes the Power and Sleep Controller (PSC). Through register settings accessible by the ARM9, the PSC provides two levels of power savings: peripheral/module clock gating and power domain shut-off. Brief details on the PSC are given in Section 6.3, Power Supplies. For more detailed information and complete register descriptions for the PSC, see Section 2.8.3, Documentation Support, for the TMS320DM644x ARM Subsystem Reference Guide (literature number SPRUE14). Submit Documentation Feedback Device Overview 11 |
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