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SPC56EC74L7 数据表(PDF) 18 Page - STMicroelectronics |
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SPC56EC74L7 数据表(HTML) 18 Page - STMicroelectronics |
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18 / 118 page ![]() Package pinouts and signal descriptions SPC564Bxx - SPC56ECxx 18/118 Doc ID 17478 Rev 4 3.2 System pins The system pins are listed in Table 4. 3.3 Functional ports The functional port pins are listed in Table 5. a. See the I/O pad electrical characteristics in the device datasheet for details. b. All medium and fast pads are in slow configuration by default at reset and can be configured as fast or medium. For example, Fast/Medium pad will be Medium by default at reset. Similarly, Slow/Medium pad will be Slow by default. Only exception is PC[1] which is in medium configuration by default (refer to PCR.SRC in the reference manual, Pad Configuration Registers (PCR0—PCR198)). Table 4. System pin descriptions Port pin Function I/O direction Pad type RESET config. Pin number RESET Bidirectional reset with Schmitt-Trigger characteristics and noise filter. I/O M Input, weak pull-up only after PHASE2 29 29 K1 EXTAL Analog input of the oscillator amplifier circuit. Needs to be grounded if oscillator bypass mode is used. IA(1) —58 74 T8 XTAL Analog output of the oscillator amplifier circuit, when the oscillator is not in bypass mode. Analog input for the clock generator when the oscillator is in bypass mode. I/O A(1) —56 72 T7 1. For analog pads, it is not recommended to enable IBE if APC is enabled to avoid extra current in middle range voltage. |
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