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SPC56EC74L7 数据表(PDF) 49 Page - STMicroelectronics |
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SPC56EC74L7 数据表(HTML) 49 Page - STMicroelectronics |
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49 / 118 page ![]() SPC564Bxx - SPC56ECxx Electrical Characteristics Doc ID 17478 Rev 4 49/118 4.2.1 NVUSRO [PAD3V5V(0)] field description Table 7 shows how NVUSRO [PAD3V5V(0)] controls the device configuration for VDD_HV_A domain. The DC electrical characteristics are dependent on the PAD3V5V(0,1) bit value. 4.2.2 NVUSRO [PAD3V5V(1)] field description Table 8 shows how NVUSRO [PAD3V5V(1)] controls the device configuration the device configuration for VDD_HV_B domain. The DC electrical characteristics are dependent on the PAD3V5V(0,1) bit value. 4.3 Absolute maximum ratings Table 7. PAD3V5V(0) field description Value(1) 1. '1' is delivery value. It is part of shadow flash memory, thus programmable by customer. Description 0 High voltage supply is 5.0 V 1 High voltage supply is 3.3 V Table 8. PAD3V5V(1) field description Value(1) 1. '1' is delivery value. It is part of shadow flash memory, thus programmable by customer. Description 0 High voltage supply is 5.0 V 1 High voltage supply is 3.3 V Table 9. Absolute maximum ratings Symbol Parameter Conditions Value Unit Min Max VSS_HV SR Digital ground on VSS_HV pins —0 0 V VDD_HV_A SR Voltage on VDD_HV_A pins with respect to ground (VSS_HV) —–0.3 6.0 V VDD_HV_B (1) SR Voltage on VDD_HV_B pins with respect to common ground (VSS_HV) —–0.3 6.0 V VSS_LV SR Voltage on VSS_LV (low voltage digital supply) pins with respect to ground (VSS_HV) —VSS_HV − 0.1 VSS_HV + 0.1 V |
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