ST10F280_12 datasheet(39/239 Pages) STMICROELECTRONICS

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ST10F280

Internal Flash memory

Doc ID 8673 Rev. 3

39/239

It is possible to temporarily disable the Code Protection using Code Temporary Unprotection

instruction.

Note:

Bits that are already at ’0’ in protection register must be confirmed at ’0’ also in data latched

during the 4th cycle of set protection command, otherwise an error may occur.

Code Temporary Unprotection (CTU). This instruction must be used to temporary disable

Code Protection. This instruction is effective only if executed from Flash memory space. To

restore the protection status, without using a reset, it is necessary to use a Code Temporary

Protection instruction. System reset will reset also the Code Temporary Unprotected status.

The Code Temporary Unprotection command consists of the following write cycle:

MOV MEM, Rn ; This instruction MUST be executed from Flash

memory space

Where MEM is an absolute address inside memory space, Rn is a register loaded with data

0FFFFh.

Code Temporary Protection (CTP). This instruction allows to restore Code Protection.

This operation is effective only if executed from Flash memory and is necessary to restore

the protection status after the use of a Code Temporary Unprotection instruction.

The Code Temporary Protection command consists of the following write cycle:

MOV MEM, Rn ; This instruction MUST be executed from Flash

memory space

Where MEM is an absolute address inside memory space, Rn is a register loaded with data

0FFFBh.

Note that Code Temporary Unprotection instruction must be used when it is necessary to

modify the Flash with protected code (SCP), since the write/erase routines must be

executed from a memory external to Flash space. Usually, the write/erase routines,

executed in RAM, ends with a return to Flash space where a CTP instruction restore the

protection.

Table 3.

Instructions

Instruction

Mne Cycle

1st

Cycle

2nd

Cycle

3rd

Cycle

4th

Cycle

5th

Cycle

6th

Cycle

7th

Cycle

Read/Reset

Addr.(1)

X(2)

Read Memory Array until a new write cycle is initiated

Data

xxF0h

Read/Reset

Addr.(1)

x1554h

x2AA8h

xxxxxh

Read Memory Array until a new write

cycle is initiated

Data

xxA8h

xx54h

xxF0h

Program Word

Addr.(1)

x1554h

x2AA8h

x1554h

WA(3)

Read Data Polling or

Toggle Bit until Program

completes.

Data

xxA8h

xx54h

xxA0h

WD(4)

Block Erase

Addr.(1)

x1554h

x2AA8h

x1554h

x2AA8h

BA’(5)

Data

xxA8h

xx54h

xx80h

xxA8h

xx54h

xx30h

Chip Erase

Addr.(1)

x1554h

x2AA8h

x1554h

x2AA8h x1554h

Note

(6)

Data

xxA8h

xx54h

xx80h

xxA8h

xx54h

xx10h

Erase Suspend

Addr.(1)

X(2)

Read until Toggle stops, then read or program all data

needed from block(s) not being erased then Resume Erase.

Data

xxB0h

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