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ST7590 数据表(PDF) 14 Page - STMicroelectronics |
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ST7590 数据表(HTML) 14 Page - STMicroelectronics |
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14 / 24 page ![]() Analog front end (AFE) ST7590 14/24 Doc ID 18349 Rev 1 4 Analog front end (AFE) 4.1 Reception path Figure 5 shows the block diagram of the ST7590 input receiving path. The reception AFE main blocks are a wide input range analog PGA (programmable gain amplifier) and the ADC (analog to digital converter). Figure 5. Reception path block diagram The PGA is controlled by a loop algorithm that detects the amplifier output signal amplitude and adapts the gain of the amplifier in order to have the optimum input voltage range for the ADC. The PGA gain ranges from -18 dB up to 30 dB (typical), with steps of 6 dB (typical), as described in Table 5. Table 5. PGA gain table PGA code PGA gain (typical) RX_IN max range [dB] [V p-p] 0-18 16 1-12 8 2-6 4 30 2 46 1 5 12 0.500 6 18 0.250 7 24 0.125 8 30 0.0625 |
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