M24M01-R M24M01-DF

DC and AC parameters

Doc ID 12943 Rev 10

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Table 15.

1 MHz AC characteristics

Symbol

Alt.

Parameter

Min.

Max.

Unit

Clock frequency

0

1

MHz

Clock pulse width high

300

-

ns

Clock pulse width low

400

-

ns

Input signal rise time

(1)

1.

There is no min. or max. values for the input signal rise and fall times. It is however recommended by the

I²C specification that the input signal rise and fall times be more than 20 ns and less than 120 ns when

(1)

ns

Input signal fall time

(1)

(1)

ns

(8)

SDA (out) fall time

-

120

ns

80

-

ns

0

-

ns

(2)

2.

To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or

rising edge of SDA.

Data out hold time

50

-

ns

(3)

3.

Clock low to next data valid (access time)

-

500

ns

250

-

ns

250

-

ns

250

-

ns

Time between Stop condition and next Start

condition

500

-

ns

(4)(8)

4.

WC=0 set up time condition to enable the execution of a WRITE command.

0

-

µs

(5)(8)

5.

WC=0 hold time condition to enable the execution of a WRITE command.

1

-

µs

Write time

-

5

ms

(6)

6.

Characterized only, not tested in production.

Pulse width ignored (input filter on SCL and

SDA)

7.

ns